From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46763) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W7Ciq-0000hd-Uz for qemu-devel@nongnu.org; Sat, 25 Jan 2014 18:33:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W7Cil-0005Qn-PW for qemu-devel@nongnu.org; Sat, 25 Jan 2014 18:33:08 -0500 Received: from mail-pa0-x22d.google.com ([2607:f8b0:400e:c03::22d]:59779) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W7Cil-0005Qh-Fi for qemu-devel@nongnu.org; Sat, 25 Jan 2014 18:33:03 -0500 Received: by mail-pa0-f45.google.com with SMTP id lf10so4580903pab.4 for ; Sat, 25 Jan 2014 15:33:02 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Sat, 25 Jan 2014 15:32:50 -0800 Message-Id: <1390692772-15282-4-git-send-email-rth@twiddle.net> In-Reply-To: <1390692772-15282-1-git-send-email-rth@twiddle.net> References: <1390692772-15282-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 3/5] tcg/i386: add support for three-byte opcodes List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: aurelien@aurel32.net, aliguori@amazon.com From: Aurelien Jarno Add support for three-byte opcodes, starting with the 0x0f 0x38 prefix. Use P_EXT38 as the new constant, and shift all other constants so that P_EXT and P_EXT38 have neighbouring values. Signed-off-by: Aurelien Jarno [RTH: Changed the name from P_EXT2 to P_EXT38.] Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c index 753b3a1..7161fe0 100644 --- a/tcg/i386/tcg-target.c +++ b/tcg/i386/tcg-target.c @@ -240,13 +240,14 @@ static inline int tcg_target_const_match(tcg_target_long val, #endif #define P_EXT 0x100 /* 0x0f opcode prefix */ -#define P_DATA16 0x200 /* 0x66 opcode prefix */ +#define P_EXT38 0x200 /* 0x0f 0x38 opcode prefix */ +#define P_DATA16 0x400 /* 0x66 opcode prefix */ #if TCG_TARGET_REG_BITS == 64 -# define P_ADDR32 0x400 /* 0x67 opcode prefix */ -# define P_REXW 0x800 /* Set REX.W = 1 */ -# define P_REXB_R 0x1000 /* REG field as byte register */ -# define P_REXB_RM 0x2000 /* R/M field as byte register */ -# define P_GS 0x4000 /* gs segment override */ +# define P_ADDR32 0x800 /* 0x67 opcode prefix */ +# define P_REXW 0x1000 /* Set REX.W = 1 */ +# define P_REXB_R 0x2000 /* REG field as byte register */ +# define P_REXB_RM 0x4000 /* R/M field as byte register */ +# define P_GS 0x8000 /* gs segment override */ #else # define P_ADDR32 0 # define P_REXW 0 @@ -398,9 +399,13 @@ static void tcg_out_opc(TCGContext *s, int opc, int r, int rm, int x) tcg_out8(s, (uint8_t)(rex | 0x40)); } - if (opc & P_EXT) { + if (opc & (P_EXT | P_EXT38)) { tcg_out8(s, 0x0f); + if (opc & P_EXT38) { + tcg_out8(s, 0x38); + } } + tcg_out8(s, opc); } #else @@ -409,8 +414,11 @@ static void tcg_out_opc(TCGContext *s, int opc) if (opc & P_DATA16) { tcg_out8(s, 0x66); } - if (opc & P_EXT) { + if (opc & (P_EXT | P_EXT38)) { tcg_out8(s, 0x0f); + if (opc & P_EXT38) { + tcg_out8(s, 0x38); + } } tcg_out8(s, opc); } -- 1.8.5.3