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From: Will Newton <will.newton@linaro.org>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>, patches@linaro.org
Subject: [Qemu-devel] [PATCH v2 05/11] target-arm: Add support for AArch32 FP VRINTX
Date: Tue, 28 Jan 2014 11:22:29 +0000	[thread overview]
Message-ID: <1390908155-23475-5-git-send-email-will.newton@linaro.org> (raw)
In-Reply-To: <1390908155-23475-1-git-send-email-will.newton@linaro.org>

Add support for the AArch32 floating-point VRINTX instruction.

Signed-off-by: Will Newton <will.newton@linaro.org>
---
 target-arm/translate.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

Changes in v2:
 - Move code outside the arms of the if

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 9afb19f..9eb5b92 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -3406,6 +3406,17 @@ static int disas_vfp_insn(CPUARMState * env, DisasContext *s, uint32_t insn)
                         tcg_temp_free_ptr(fpst);
                         break;
                     }
+                    case 14: /* vrintx */
+                    {
+                        TCGv_ptr fpst = get_fpstatus_ptr(0);
+                        if (dp) {
+                            gen_helper_rintd_exact(cpu_F0d, cpu_F0d, fpst);
+                        } else {
+                            gen_helper_rints_exact(cpu_F0s, cpu_F0s, fpst);
+                        }
+                        tcg_temp_free_ptr(fpst);
+                        break;
+                    }
                     case 15: /* single<->double conversion */
                         if (dp)
                             gen_helper_vfp_fcvtsd(cpu_F0s, cpu_F0d, cpu_env);
-- 
1.8.1.4

  parent reply	other threads:[~2014-01-28 11:23 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-01-28 11:22 [Qemu-devel] [PATCH v2 01/11] target-arm: Move arm_rmode_to_sf to a shared location Will Newton
2014-01-28 11:22 ` [Qemu-devel] [PATCH v2 02/11] target-arm: Add AArch32 FP VRINTA, VRINTN, VRINTP and VRINTM Will Newton
2014-01-28 11:22 ` [Qemu-devel] [PATCH v2 03/11] target-arm: Add support for AArch32 FP VRINTR Will Newton
2014-01-28 11:22 ` [Qemu-devel] [PATCH v2 04/11] target-arm: Add support for AArch32 FP VRINTZ Will Newton
2014-01-28 11:22 ` Will Newton [this message]
2014-01-28 11:22 ` [Qemu-devel] [PATCH v2 06/11] target-arm: Add support for AArch32 SIMD VRINTX Will Newton
2014-01-28 11:22 ` [Qemu-devel] [PATCH v2 07/11] target-arm: Add set_neon_rmode helper Will Newton
2014-01-28 11:22 ` [Qemu-devel] [PATCH v2 08/11] target-arm: Add AArch32 SIMD VRINTA, VRINTN, VRINTP, VRINTM, VRINTZ Will Newton
2014-01-28 11:22 ` [Qemu-devel] [PATCH v2 09/11] target-arm: Add AArch32 FP VCVTA, VCVTN, VCVTP and VCVTM Will Newton
2014-01-28 11:22 ` [Qemu-devel] [PATCH v2 10/11] target-arm: Add AArch32 SIMD " Will Newton
2014-01-28 11:22 ` [Qemu-devel] [PATCH v2 11/11] target-arm: Add support for AArch32 64bit VCVTB and VCVTT Will Newton
2014-01-28 15:26   ` Peter Maydell
2014-01-28 15:05 ` [Qemu-devel] [PATCH v2 01/11] target-arm: Move arm_rmode_to_sf to a shared location Peter Maydell

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