From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59378) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W8FLB-0004C6-8w for qemu-devel@nongnu.org; Tue, 28 Jan 2014 15:33:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W8FL5-0005yc-5H for qemu-devel@nongnu.org; Tue, 28 Jan 2014 15:33:01 -0500 Received: from mail-pa0-f48.google.com ([209.85.220.48]:43786) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W8FL4-0005yQ-Vu for qemu-devel@nongnu.org; Tue, 28 Jan 2014 15:32:55 -0500 Received: by mail-pa0-f48.google.com with SMTP id kx10so837226pab.35 for ; Tue, 28 Jan 2014 12:32:54 -0800 (PST) From: Christoffer Dall Date: Tue, 28 Jan 2014 12:32:39 -0800 Message-Id: <1390941165-2079-3-git-send-email-christoffer.dall@linaro.org> In-Reply-To: <1390941165-2079-1-git-send-email-christoffer.dall@linaro.org> References: <1390941165-2079-1-git-send-email-christoffer.dall@linaro.org> Subject: [Qemu-devel] [PATCH v5 2/8] arm_gic: Fix GICD_ICPENDR and GICD_ISPENDR writes List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: kvmarm@lists.cs.columbia.edu, Christoffer Dall , patches@linaro.org Fix two bugs that would allow changing the state of SGIs through the ICPENDR and ISPENDRs. Signed-off-by: Christoffer Dall --- Changes [v1 -> v5]: - New patch in series hw/intc/arm_gic.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 98c6ff5..1c4a114 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -428,7 +428,7 @@ static void gic_dist_writeb(void *opaque, hwaddr offset, if (irq >= s->num_irq) goto bad_reg; if (irq < GIC_NR_SGIS) { - irq = 0; + value = 0; } for (i = 0; i < 8; i++) { @@ -441,6 +441,10 @@ static void gic_dist_writeb(void *opaque, hwaddr offset, irq = (offset - 0x280) * 8 + GIC_BASE_IRQ; if (irq >= s->num_irq) goto bad_reg; + if (irq < GIC_NR_SGIS) { + value = 0; + } + for (i = 0; i < 8; i++) { /* ??? This currently clears the pending bit for all CPUs, even for per-CPU interrupts. It's unclear whether this is the -- 1.8.5.2