From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38799) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W9GUW-0000BJ-4e for qemu-devel@nongnu.org; Fri, 31 Jan 2014 10:58:53 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W9GUU-0005ST-Kj for qemu-devel@nongnu.org; Fri, 31 Jan 2014 10:58:51 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:45421) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W9GUU-0005Pb-CK for qemu-devel@nongnu.org; Fri, 31 Jan 2014 10:58:50 -0500 From: Peter Maydell Date: Fri, 31 Jan 2014 15:45:14 +0000 Message-Id: <1391183143-30724-7-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1391183143-30724-1-git-send-email-peter.maydell@linaro.org> References: <1391183143-30724-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH v2 06/35] target-arm: Log bad system register accesses with LOG_UNIMP List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Rob Herring , Peter Crosthwaite , patches@linaro.org, Michael Matz , Alexander Graf , Claudio Fontana , Dirk Mueller , Will Newton , Laurent Desnogues , =?UTF-8?q?Alex=20Benn=C3=A9e?= , kvmarm@lists.cs.columbia.edu, Christoffer Dall , Richard Henderson Log guest attempts to access unimplemented system registers via the LOG_UNIMP reporting mechanism (for both the 32 bit and 64 bit instruction sets). This is particularly useful for debugging problems where the guest is trying to use a system register that QEMU doesn't implement. Signed-off-by: Peter Maydell Reviewed-by: Peter Crosthwaite --- target-arm/translate-a64.c | 7 ++++++- target-arm/translate.c | 13 +++++++++++++ 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index ee768f2..f808998 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -1172,7 +1172,12 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread, crn, crm, op0, op1, op2)); if (!ri) { - /* Unknown register */ + /* Unknown register; this might be a guest error or a QEMU + * unimplemented feature. + */ + qemu_log_mask(LOG_UNIMP, "%s access to unsupported AArch64 " + "system register op0:%d op1:%d crn:%d crm:%d op2:%d\n", + isread ? "read" : "write", op0, op1, crn, crm, op2); unallocated_encoding(s); return; } diff --git a/target-arm/translate.c b/target-arm/translate.c index e701c0f..45886f9 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -6923,6 +6923,19 @@ static int disas_coproc_insn(CPUARMState * env, DisasContext *s, uint32_t insn) return 0; } + /* Unknown register; this might be a guest error or a QEMU + * unimplemented feature. + */ + if (is64) { + qemu_log_mask(LOG_UNIMP, "%s access to unsupported AArch32 " + "64 bit system register cp:%d opc1: %d crm:%d\n", + isread ? "read" : "write", cpnum, opc1, crm); + } else { + qemu_log_mask(LOG_UNIMP, "%s access to unsupported AArch32 " + "system register cp:%d opc1:%d crn:%d crm:%d opc2:%d\n", + isread ? "read" : "write", cpnum, opc1, crn, crm, opc2); + } + return 1; } -- 1.8.5