From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53904) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WAH79-0000gM-Cu for qemu-devel@nongnu.org; Mon, 03 Feb 2014 05:51:01 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WAH73-0003JP-9E for qemu-devel@nongnu.org; Mon, 03 Feb 2014 05:50:55 -0500 Received: from mx1.redhat.com ([209.132.183.28]:15211) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WAH73-0003JK-02 for qemu-devel@nongnu.org; Mon, 03 Feb 2014 05:50:49 -0500 From: Igor Mammedov Date: Mon, 3 Feb 2014 11:44:58 +0100 Message-Id: <1391424301-22703-3-git-send-email-imammedo@redhat.com> In-Reply-To: <1391424301-22703-1-git-send-email-imammedo@redhat.com> References: <1391424301-22703-1-git-send-email-imammedo@redhat.com> Subject: [Qemu-devel] [PATCH v4 2/5] pcihp: make PCI hotplug mmio handlers indifferent to PCI_HOTPLUG_ADDR List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: aliguori@amazon.com, mst@redhat.com ... removes dependency of mmio handler on PCI_HOTPLUG_ADDR. It will be needed in case of Q35 where base could be different. Signed-off-by: Igor Mammedov --- hw/acpi/pcihp.c | 24 ++++++++++++------------ 1 files changed, 12 insertions(+), 12 deletions(-) diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index 464739a..64c8cf2 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -48,11 +48,11 @@ #define PCI_HOTPLUG_ADDR 0xae00 #define PCI_HOTPLUG_SIZE 0x0014 -#define PCI_UP_BASE 0xae00 -#define PCI_DOWN_BASE 0xae04 -#define PCI_EJ_BASE 0xae08 -#define PCI_RMV_BASE 0xae0c -#define PCI_SEL_BASE 0xae10 +#define PCI_UP_BASE 0x0000 +#define PCI_DOWN_BASE 0x0004 +#define PCI_EJ_BASE 0x0008 +#define PCI_RMV_BASE 0x000c +#define PCI_SEL_BASE 0x0010 typedef struct AcpiPciHpFind { int bsel; @@ -213,24 +213,24 @@ static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size) } switch (addr) { - case PCI_UP_BASE - PCI_HOTPLUG_ADDR: + case PCI_UP_BASE: val = s->acpi_pcihp_pci_status[bsel].up; s->acpi_pcihp_pci_status[bsel].up = 0; ACPI_PCIHP_DPRINTF("pci_up_read %" PRIu32 "\n", val); break; - case PCI_DOWN_BASE - PCI_HOTPLUG_ADDR: + case PCI_DOWN_BASE: val = s->acpi_pcihp_pci_status[bsel].down; ACPI_PCIHP_DPRINTF("pci_down_read %" PRIu32 "\n", val); break; - case PCI_EJ_BASE - PCI_HOTPLUG_ADDR: + case PCI_EJ_BASE: /* No feature defined yet */ ACPI_PCIHP_DPRINTF("pci_features_read %" PRIu32 "\n", val); break; - case PCI_RMV_BASE - PCI_HOTPLUG_ADDR: + case PCI_RMV_BASE: val = s->acpi_pcihp_pci_status[bsel].hotplug_enable; ACPI_PCIHP_DPRINTF("pci_rmv_read %" PRIu32 "\n", val); break; - case PCI_SEL_BASE - PCI_HOTPLUG_ADDR: + case PCI_SEL_BASE: val = s->hotplug_select; ACPI_PCIHP_DPRINTF("pci_sel_read %" PRIu32 "\n", val); default: @@ -245,7 +245,7 @@ static void pci_write(void *opaque, hwaddr addr, uint64_t data, { AcpiPciHpState *s = opaque; switch (addr) { - case PCI_EJ_BASE - PCI_HOTPLUG_ADDR: + case PCI_EJ_BASE: if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) { break; } @@ -253,7 +253,7 @@ static void pci_write(void *opaque, hwaddr addr, uint64_t data, ACPI_PCIHP_DPRINTF("pciej write %" HWADDR_PRIx " <== %" PRIu64 "\n", addr, data); break; - case PCI_SEL_BASE - PCI_HOTPLUG_ADDR: + case PCI_SEL_BASE: s->hotplug_select = data; ACPI_PCIHP_DPRINTF("pcisel write %" HWADDR_PRIx " <== %" PRIu64 "\n", addr, data); -- 1.7.1