From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47083) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WCAIS-0007TR-BB for qemu-devel@nongnu.org; Sat, 08 Feb 2014 10:58:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WCAIR-0002uY-6G for qemu-devel@nongnu.org; Sat, 08 Feb 2014 10:58:24 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:45684) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WCAIR-0002tl-0X for qemu-devel@nongnu.org; Sat, 08 Feb 2014 10:58:23 -0500 From: Peter Maydell Date: Sat, 8 Feb 2014 15:58:04 +0000 Message-Id: <1391875084-12772-30-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1391875084-12772-1-git-send-email-peter.maydell@linaro.org> References: <1391875084-12772-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PULL 29/29] arm/zynq: Add software system reset via SCLR List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: Blue Swirl , qemu-devel@nongnu.org, Aurelien Jarno From: Sebastian Huber Support software-driven system reset via the register in the SCLR. Signed-off-by: Sebastian Huber Reviewed-by: Peter Crosthwaite Signed-off-by: Peter Maydell --- hw/misc/zynq_slcr.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c index e42a5b0..d1cc233 100644 --- a/hw/misc/zynq_slcr.c +++ b/hw/misc/zynq_slcr.c @@ -31,6 +31,8 @@ #define XILINX_LOCK_KEY 0x767b #define XILINX_UNLOCK_KEY 0xdf0d +#define R_PSS_RST_CTRL_SOFT_RST 0x1 + typedef enum { ARM_PLL_CTRL, DDR_PLL_CTRL, @@ -399,6 +401,9 @@ static void zynq_slcr_write(void *opaque, hwaddr offset, goto bad_reg; } s->reset[(offset - 0x200) / 4] = val; + if (offset == 0x200 && (val & R_PSS_RST_CTRL_SOFT_RST)) { + qemu_system_reset_request(); + } break; case 0x300: s->apu_ctrl = val; -- 1.8.5