From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from eggs.gnu.org ([2001:4830:134:3::10]:37015)
	by lists.gnu.org with esmtp (Exim 4.71)
	(envelope-from <tommusta@gmail.com>) id 1WDhHM-0008KQ-WC
	for qemu-devel@nongnu.org; Wed, 12 Feb 2014 16:23:45 -0500
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)
	(envelope-from <tommusta@gmail.com>) id 1WDhHE-0002ma-J9
	for qemu-devel@nongnu.org; Wed, 12 Feb 2014 16:23:36 -0500
From: Tom Musta <tommusta@gmail.com>
Date: Wed, 12 Feb 2014 15:22:51 -0600
Message-Id: <1392240199-2454-1-git-send-email-tommusta@gmail.com>
Subject: [Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: qemu-devel@nongnu.org
Cc: Tom Musta <tommusta@gmail.com>, qemu-ppc@nongnu.org

This patch series implements the changes to Altivec introduced by Power ISA
Version 2.07.

Tom Musta (28):
  target-ppc: Altivec 2.07: Add Instruction Flag
  target-ppc: Altivec 2.07: Update AVR Structure
  target-ppc: Altivec 2.07: Add GEN_VXFORM3
  target-ppc: Altivec 2.07: Add Support for Dual Altivec Instructions
  target-ppc: Altivec 2.07: Add Opcode Macro for VX Form Instructions
  target-ppc: Altivec 2.07: Add Support for R-Form Dual Instructions
  target-ppc: Altivec 2.07: Vector Logical Instructions
  target-ppc: Altivec 2.07: Add/Subtract Unsigned Doubleword Modulo
  target-ppc: Altivec 2.07: Change VMUL_DO to Support 64-bit Integers
  target-ppc: Altivec 2.07: Multiply Even/Odd Word Instructions
  target-ppc: Altivec 2.07: vmuluw Instruction
  target-ppc: Altivec 2.07: Add Vector Count Leading Zeroes
  target-ppc: Altivec 2.07: Vector Population Count Instructions
  target-ppc: Altivec 2.07: Vector Min/Max Doubleword Instructions
  target-ppc: Altivec 2.07: Pack Doubleword Instructions
  target-ppc: Altivec 2.07: Unpack Signed Word Instructions
  target-ppc: Altivec 2.07: Vector Merge Instructions
  target-ppc: Altivec 2.07: Change Bit Masks to Support 64-bit Rotates
    and Shifts
  target-ppc: Altivec 2.07: Vector Doubleword Rotate and Shift
    Instructions
  target-ppc: Altivec 2.07: Quadword Addition and Subtracation
  target-ppc: Altivec 2.07: vbpermq Instruction
  target-ppc: Altivec 2.07: Doubleword Compares
  target-ppc: Altivec 2.07: Vector Gather Bits by Bytes
  target-ppc: Altivec 2.07: Vector Polynomial Multiply Sum
  target-ppc: Altivec 2.07: Binary Coded Decimal Instructions
  target-ppc: Altivec 2.07: AES Instructions
  target-ppc: Altivec 2.07: Vector SHA Sigma Instructions
  target-ppc: Altivec 2.07: Vector Permute and Exclusive OR

 target-ppc/cpu.h            |    9 +-
 target-ppc/helper.h         |   62 +++
 target-ppc/int_helper.c     | 1278 +++++++++++++++++++++++++++++++++++++++++--
 target-ppc/translate.c      |  348 ++++++++++++-
 target-ppc/translate_init.c |    2 +-
 5 files changed, 1648 insertions(+), 51 deletions(-)