From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37423) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WDhHv-0000TW-GQ for qemu-devel@nongnu.org; Wed, 12 Feb 2014 16:24:20 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WDhHn-00031E-2o for qemu-devel@nongnu.org; Wed, 12 Feb 2014 16:24:11 -0500 From: Tom Musta Date: Wed, 12 Feb 2014 15:23:01 -0600 Message-Id: <1392240199-2454-11-git-send-email-tommusta@gmail.com> In-Reply-To: <1392240199-2454-1-git-send-email-tommusta@gmail.com> References: <1392240199-2454-1-git-send-email-tommusta@gmail.com> Subject: [Qemu-devel] [PATCH 10/28] target-ppc: Altivec 2.07: Multiply Even/Odd Word Instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Tom Musta , qemu-ppc@nongnu.org This patch adds the Multilpy Even/Odd Word instructions that are introduced in Power ISA Version 2.07: - Vector Multiply Even Unsigned Word (vmuleuw) - Vector Multiply Even Signed Word (vmulesw) - Vector Multiply Odd Unsigned Word (vmulouw) - Vector Multiply Odd Signed Word (vmulosw) Signed-off-by: Tom Musta --- target-ppc/helper.h | 4 ++++ target-ppc/int_helper.c | 2 ++ target-ppc/translate.c | 8 ++++++++ 3 files changed, 14 insertions(+), 0 deletions(-) diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 1106e29..ca18447 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -166,12 +166,16 @@ DEF_HELPER_3(vmrghh, void, avr, avr, avr) DEF_HELPER_3(vmrghw, void, avr, avr, avr) DEF_HELPER_3(vmulesb, void, avr, avr, avr) DEF_HELPER_3(vmulesh, void, avr, avr, avr) +DEF_HELPER_3(vmulesw, void, avr, avr, avr) DEF_HELPER_3(vmuleub, void, avr, avr, avr) DEF_HELPER_3(vmuleuh, void, avr, avr, avr) +DEF_HELPER_3(vmuleuw, void, avr, avr, avr) DEF_HELPER_3(vmulosb, void, avr, avr, avr) DEF_HELPER_3(vmulosh, void, avr, avr, avr) +DEF_HELPER_3(vmulosw, void, avr, avr, avr) DEF_HELPER_3(vmuloub, void, avr, avr, avr) DEF_HELPER_3(vmulouh, void, avr, avr, avr) +DEF_HELPER_3(vmulouw, void, avr, avr, avr) DEF_HELPER_3(vsrab, void, avr, avr, avr) DEF_HELPER_3(vsrah, void, avr, avr, avr) DEF_HELPER_3(vsraw, void, avr, avr, avr) diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c index 20d34e6..09590c7 100644 --- a/target-ppc/int_helper.c +++ b/target-ppc/int_helper.c @@ -1005,8 +1005,10 @@ void helper_vmsumuhs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, VMUL_DO(mulo##suffix, mul_element, prod_element, cast, 0) VMUL(sb, s8, s16, int16_t) VMUL(sh, s16, s32, int32_t) +VMUL(sw, s32, s64, int64_t) VMUL(ub, u8, u16, uint16_t) VMUL(uh, u16, u32, uint32_t) +VMUL(uw, u32, u64, uint64_t) #undef VMUL_DO #undef VMUL diff --git a/target-ppc/translate.c b/target-ppc/translate.c index bb1c64e..faee4c3 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -6961,12 +6961,16 @@ GEN_VXFORM(vmrglh, 6, 5); GEN_VXFORM(vmrglw, 6, 6); GEN_VXFORM(vmuloub, 4, 0); GEN_VXFORM(vmulouh, 4, 1); +GEN_VXFORM(vmulouw, 4, 2); GEN_VXFORM(vmulosb, 4, 4); GEN_VXFORM(vmulosh, 4, 5); +GEN_VXFORM(vmulosw, 4, 6); GEN_VXFORM(vmuleub, 4, 8); GEN_VXFORM(vmuleuh, 4, 9); +GEN_VXFORM(vmuleuw, 4, 10); GEN_VXFORM(vmulesb, 4, 12); GEN_VXFORM(vmulesh, 4, 13); +GEN_VXFORM(vmulesw, 4, 14); GEN_VXFORM(vslb, 2, 4); GEN_VXFORM(vslh, 2, 5); GEN_VXFORM(vslw, 2, 6); @@ -10344,12 +10348,16 @@ GEN_VXFORM(vmrglh, 6, 5), GEN_VXFORM(vmrglw, 6, 6), GEN_VXFORM(vmuloub, 4, 0), GEN_VXFORM(vmulouh, 4, 1), +GEN_VXFORM_207(vmulouw, 4, 2), GEN_VXFORM(vmulosb, 4, 4), GEN_VXFORM(vmulosh, 4, 5), +GEN_VXFORM_207(vmulosw, 4, 6), GEN_VXFORM(vmuleub, 4, 8), GEN_VXFORM(vmuleuh, 4, 9), +GEN_VXFORM_207(vmuleuw, 4, 10), GEN_VXFORM(vmulesb, 4, 12), GEN_VXFORM(vmulesh, 4, 13), +GEN_VXFORM_207(vmulesw, 4, 14), GEN_VXFORM(vslb, 2, 4), GEN_VXFORM(vslh, 2, 5), GEN_VXFORM(vslw, 2, 6), -- 1.7.1