From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50096) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WDtWK-0005pA-N8 for qemu-devel@nongnu.org; Thu, 13 Feb 2014 05:27:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WDtWE-0003dp-Li for qemu-devel@nongnu.org; Thu, 13 Feb 2014 05:27:52 -0500 Received: from mail.codeweavers.com ([216.251.189.131]:43123) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WDtWE-0003S7-Gn for qemu-devel@nongnu.org; Thu, 13 Feb 2014 05:27:46 -0500 From: Huw Davies Date: Thu, 13 Feb 2014 10:26:46 +0000 Message-Id: <1392287206-30889-1-git-send-email-huw@codeweavers.com> Subject: [Qemu-devel] [PATCH] tcg-arm: The shift count of op_rotl_i32 is in args[2] not args[1]. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu devel Cc: Richard Henderson It's this that should be subtracted from 0x20 when converting to a right rotate. Signed-off-by: Huw Davies --- tcg/arm/tcg-target.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index 82658a1..c8884b3 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -1866,7 +1866,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, SHIFT_IMM_ROR((0x20 - args[2]) & 0x1f) : SHIFT_IMM_LSL(0)); } else { - tcg_out_dat_imm(s, COND_AL, ARITH_RSB, TCG_REG_TMP, args[1], 0x20); + tcg_out_dat_imm(s, COND_AL, ARITH_RSB, TCG_REG_TMP, args[2], 0x20); tcg_out_dat_reg(s, COND_AL, ARITH_MOV, args[0], 0, args[1], SHIFT_REG_ROR(TCG_REG_TMP)); } -- 1.8.0