From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34139) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WF6LE-0002of-55 for qemu-devel@nongnu.org; Sun, 16 Feb 2014 13:21:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WF6LC-0001VB-I7 for qemu-devel@nongnu.org; Sun, 16 Feb 2014 13:21:24 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:45921) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WF6LC-0001UR-Bn for qemu-devel@nongnu.org; Sun, 16 Feb 2014 13:21:22 -0500 From: Peter Maydell Date: Sun, 16 Feb 2014 18:21:05 +0000 Message-Id: <1392574872-28725-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 0/6] A64: finish Neon 3-reg-diff category, add LDTR/STTR List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Crosthwaite , patches@linaro.org, Michael Matz , Alexander Graf , Claudio Fontana , Dirk Mueller , Will Newton , Laurent Desnogues , =?UTF-8?q?Alex=20Benn=C3=A9e?= , kvmarm@lists.cs.columbia.edu, Christoffer Dall , Richard Henderson Another patchset of random filling in the gaps in our Neon coverage. Patches 1 through 5 complete our handling of the three-reg-different category of Neon instructions. Patch 6 implements the "unprivileged load/store" LDTR/STTR instructions. (In fact AArch64 Linux doesn't use these, and they're pretty pointless in user mode, but they're easy enough to implement.) I haven't put in any of the fp_access_check() calls because I'm assuming these will pass code review before the system emulation patchset does; I'll update the latter to add the extra checks as necessary at that point. thanks -- PMM Peter Maydell (6): target-arm: A64: Add opcode comments to disas_simd_three_reg_diff target-arm: A64: Add most remaining three-reg-diff widening ops target-arm: A64: Implement the wide 3-reg-different operations target-arm: A64: Implement narrowing three-reg-diff operations target-arm: A64: Implement PMULL instruction target-arm: A64: Implement unprivileged load/store target-arm/helper-a64.c | 30 ++++ target-arm/helper-a64.h | 2 + target-arm/translate-a64.c | 336 ++++++++++++++++++++++++++++++++++++--------- target-arm/translate.c | 1 + target-arm/translate.h | 6 + 5 files changed, 310 insertions(+), 65 deletions(-) -- 1.8.5