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* [Qemu-devel] [PATCH 0/3] target-arm: Add support for AArch32 ARMv8 CRC32 instructions
@ 2014-02-17 17:19 Will Newton
  2014-02-17 17:19 ` [Qemu-devel] [PATCH 1/3] include/qemu/crc32c.h: Rename include guards to match filename Will Newton
                   ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Will Newton @ 2014-02-17 17:19 UTC (permalink / raw)
  To: qemu-devel

This series adds support for the AArch32 CRC32 instructions added in
ARMv8. The CRC-32 algorithm is added alongside the existing CRC-32C
implementation which requires a small fix to the crc32c.h header file.

Will Newton (3):
  include/qemu/crc32c.h: Rename include guards to match filename
  util/crc32.c: Add CRC-32 implementation
  target-arm: Add support for AArch32 ARMv8 CRC32 instructions

 include/qemu/crc32.h   | 15 ++++++++
 include/qemu/crc32c.h  |  4 +--
 target-arm/helper.c    | 37 +++++++++++++++++++
 target-arm/helper.h    |  3 ++
 target-arm/translate.c | 48 +++++++++++++++++++++++++
 util/Makefile.objs     |  1 +
 util/crc32.c           | 98 ++++++++++++++++++++++++++++++++++++++++++++++++++
 7 files changed, 204 insertions(+), 2 deletions(-)
 create mode 100644 include/qemu/crc32.h
 create mode 100644 util/crc32.c

-- 
1.8.1.4

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [Qemu-devel] [PATCH 1/3] include/qemu/crc32c.h: Rename include guards to match filename
  2014-02-17 17:19 [Qemu-devel] [PATCH 0/3] target-arm: Add support for AArch32 ARMv8 CRC32 instructions Will Newton
@ 2014-02-17 17:19 ` Will Newton
  2014-02-17 17:22   ` Peter Maydell
  2014-02-17 17:19 ` [Qemu-devel] [PATCH 2/3] util/crc32.c: Add CRC-32 implementation Will Newton
  2014-02-17 17:19 ` [Qemu-devel] [PATCH 3/3] target-arm: Add support for AArch32 ARMv8 CRC32 instructions Will Newton
  2 siblings, 1 reply; 6+ messages in thread
From: Will Newton @ 2014-02-17 17:19 UTC (permalink / raw)
  To: qemu-devel

Signed-off-by: Will Newton <will.newton@linaro.org>
---
 include/qemu/crc32c.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/qemu/crc32c.h b/include/qemu/crc32c.h
index 56d1c3b..dafb6a1 100644
--- a/include/qemu/crc32c.h
+++ b/include/qemu/crc32c.h
@@ -25,8 +25,8 @@
  *
  */
 
-#ifndef QEMU_CRC32_H
-#define QEMU_CRC32_H
+#ifndef QEMU_CRC32C_H
+#define QEMU_CRC32C_H
 
 #include "qemu-common.h"
 
-- 
1.8.1.4

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [Qemu-devel] [PATCH 2/3] util/crc32.c: Add CRC-32 implementation
  2014-02-17 17:19 [Qemu-devel] [PATCH 0/3] target-arm: Add support for AArch32 ARMv8 CRC32 instructions Will Newton
  2014-02-17 17:19 ` [Qemu-devel] [PATCH 1/3] include/qemu/crc32c.h: Rename include guards to match filename Will Newton
@ 2014-02-17 17:19 ` Will Newton
  2014-02-17 17:29   ` Peter Maydell
  2014-02-17 17:19 ` [Qemu-devel] [PATCH 3/3] target-arm: Add support for AArch32 ARMv8 CRC32 instructions Will Newton
  2 siblings, 1 reply; 6+ messages in thread
From: Will Newton @ 2014-02-17 17:19 UTC (permalink / raw)
  To: qemu-devel

Add a table-driven CRC-32 implementation similar in style to the
existing CRC-32C implementation.

Signed-off-by: Will Newton <will.newton@linaro.org>
---
 include/qemu/crc32.h | 15 ++++++++
 util/Makefile.objs   |  1 +
 util/crc32.c         | 98 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 114 insertions(+)
 create mode 100644 include/qemu/crc32.h
 create mode 100644 util/crc32.c

diff --git a/include/qemu/crc32.h b/include/qemu/crc32.h
new file mode 100644
index 0000000..c79daf5
--- /dev/null
+++ b/include/qemu/crc32.h
@@ -0,0 +1,15 @@
+/*
+ *  CRC32C Checksum Algorithm
+ *
+ *  Polynomial: 0x04C11DB7
+ *
+ */
+
+#ifndef QEMU_CRC32_H
+#define QEMU_CRC32_H
+
+#include "qemu-common.h"
+
+uint32_t crc32(uint32_t crc, const uint8_t *data, unsigned int length);
+
+#endif
diff --git a/util/Makefile.objs b/util/Makefile.objs
index 937376b..7ce7432 100644
--- a/util/Makefile.objs
+++ b/util/Makefile.objs
@@ -14,3 +14,4 @@ util-obj-y += crc32c.o
 util-obj-y += throttle.o
 util-obj-y += getauxval.o
 util-obj-y += readline.o
+util-obj-y += crc32.o
diff --git a/util/crc32.c b/util/crc32.c
new file mode 100644
index 0000000..d66243a
--- /dev/null
+++ b/util/crc32.c
@@ -0,0 +1,98 @@
+/*
+ *  CRC32 Checksum Algorithm
+ *
+ *  Polynomial: 0x04C11DB7
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ */
+
+#include "qemu-common.h"
+#include "qemu/crc32.h"
+
+/*
+ * This is the CRC-32 table
+ * Generated with:
+ * width = 32 bits
+ * poly = 0x04C11DB7
+ * reflect input bytes = true
+ * reflect output bytes = true
+ */
+
+static const uint32_t crc32_table[256] = {
+    0x00000000, 0x77073096, 0xee0e612c, 0x990951ba,
+    0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,
+    0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
+    0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,
+    0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de,
+    0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
+    0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec,
+    0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,
+    0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
+    0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,
+    0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940,
+    0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
+    0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116,
+    0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,
+    0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
+    0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,
+    0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a,
+    0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
+    0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818,
+    0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,
+    0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
+    0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,
+    0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c,
+    0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
+    0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2,
+    0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,
+    0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
+    0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,
+    0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086,
+    0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
+    0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4,
+    0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,
+    0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
+    0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,
+    0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8,
+    0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
+    0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe,
+    0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,
+    0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
+    0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,
+    0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252,
+    0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
+    0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60,
+    0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,
+    0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
+    0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,
+    0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04,
+    0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
+    0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a,
+    0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,
+    0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
+    0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,
+    0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e,
+    0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
+    0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c,
+    0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,
+    0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
+    0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,
+    0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0,
+    0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
+    0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6,
+    0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,
+    0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
+    0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d
+};
+
+uint32_t crc32(uint32_t crc, const uint8_t *data, unsigned int length)
+{
+    while (length--) {
+        crc = crc32_table[(crc ^ *data++) & 0xFFL] ^ (crc >> 8);
+    }
+    return crc^0xffffffff;
+}
-- 
1.8.1.4

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [Qemu-devel] [PATCH 3/3] target-arm: Add support for AArch32 ARMv8 CRC32 instructions
  2014-02-17 17:19 [Qemu-devel] [PATCH 0/3] target-arm: Add support for AArch32 ARMv8 CRC32 instructions Will Newton
  2014-02-17 17:19 ` [Qemu-devel] [PATCH 1/3] include/qemu/crc32c.h: Rename include guards to match filename Will Newton
  2014-02-17 17:19 ` [Qemu-devel] [PATCH 2/3] util/crc32.c: Add CRC-32 implementation Will Newton
@ 2014-02-17 17:19 ` Will Newton
  2 siblings, 0 replies; 6+ messages in thread
From: Will Newton @ 2014-02-17 17:19 UTC (permalink / raw)
  To: qemu-devel

Add support for AArch32 CRC32 and CRC32C instructions added in ARMv8.

Signed-off-by: Will Newton <will.newton@linaro.org>
---
 target-arm/helper.c    | 37 +++++++++++++++++++++++++++++++++++++
 target-arm/helper.h    |  3 +++
 target-arm/translate.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 88 insertions(+)

diff --git a/target-arm/helper.c b/target-arm/helper.c
index 5ae08c9..d773612 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -5,6 +5,8 @@
 #include "sysemu/arch_init.h"
 #include "sysemu/sysemu.h"
 #include "qemu/bitops.h"
+#include "qemu/crc32.h"
+#include "qemu/crc32c.h"
 
 #ifndef CONFIG_USER_ONLY
 static inline int get_phys_addr(CPUARMState *env, uint32_t address,
@@ -4468,3 +4470,38 @@ int arm_rmode_to_sf(int rmode)
     }
     return rmode;
 }
+
+static void crc_init_buffer(uint8_t *buf, uint32_t val, uint32_t bytes)
+{
+    memset(buf, 0, 4);
+
+    if (bytes == 1) {
+        buf[0] = val & 0xff;
+    } else if (bytes == 2) {
+        buf[0] = val & 0xff;
+        buf[1] = (val >> 8) & 0xff;
+    } else {
+        buf[0] = val & 0xff;
+        buf[1] = (val >> 8) & 0xff;
+        buf[2] = (val >> 16) & 0xff;
+        buf[3] = (val >> 24) & 0xff;
+    }
+}
+
+uint32_t HELPER(crc32)(uint32_t acc, uint32_t val, uint32_t bytes)
+{
+    uint8_t buf[4];
+
+    crc_init_buffer(buf, val, bytes);
+
+    return crc32(acc, buf, bytes) ^ 0xffffffff;
+}
+
+uint32_t HELPER(crc32c)(uint32_t acc, uint32_t val, uint32_t bytes)
+{
+    uint8_t buf[4];
+
+    crc_init_buffer(buf, val, bytes);
+
+    return crc32c(acc, buf, bytes) ^ 0xffffffff;
+}
diff --git a/target-arm/helper.h b/target-arm/helper.h
index 951e6ad..fb92e53 100644
--- a/target-arm/helper.h
+++ b/target-arm/helper.h
@@ -494,6 +494,9 @@ DEF_HELPER_3(neon_qzip32, void, env, i32, i32)
 DEF_HELPER_4(crypto_aese, void, env, i32, i32, i32)
 DEF_HELPER_4(crypto_aesmc, void, env, i32, i32, i32)
 
+DEF_HELPER_3(crc32, i32, i32, i32, i32)
+DEF_HELPER_3(crc32c, i32, i32, i32, i32)
+
 #ifdef TARGET_AARCH64
 #include "helper-a64.h"
 #endif
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 782aab8..9410b6a 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -7541,6 +7541,32 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s)
             store_reg(s, 14, tmp2);
             gen_bx(s, tmp);
             break;
+        case 0x4:
+        {
+            /* crc32/crc32c */
+            uint32_t c = extract32(insn, 9, 1);
+
+            /* size == 64 is UNPREDICTABLE but handle as UNDEFINED.  */
+            if (op1 == 0x3) {
+                goto illegal_op;
+            }
+
+            rn = (insn >> 16) & 0xf;
+            rd = (insn >> 12) & 0xf;
+
+            tmp = load_reg(s, rn);
+            tmp2 = load_reg(s, rm);
+            tmp3 = tcg_const_i32(1 << op1);
+            if (c) {
+                gen_helper_crc32c(tmp, tmp, tmp2, tmp3);
+            } else {
+                gen_helper_crc32(tmp, tmp, tmp2, tmp3);
+            }
+            tcg_temp_free_i32(tmp2);
+            tcg_temp_free_i32(tmp3);
+            store_reg(s, rd, tmp);
+            break;
+        }
         case 0x5: /* saturating add/subtract */
             ARCH(5TE);
             rd = (insn >> 12) & 0xf;
@@ -9125,6 +9151,28 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
                 case 0x18: /* clz */
                     gen_helper_clz(tmp, tmp);
                     break;
+                case 0x20:
+                case 0x21:
+                case 0x22:
+                case 0x28:
+                case 0x29:
+                case 0x2a:
+                {
+                    /* crc32/crc32c */
+                    uint32_t sz = op & 0x3;
+                    uint32_t c = op & 0x8;
+
+                    tmp2 = load_reg(s, rm);
+                    tmp3 = tcg_const_i32(1 << sz);
+                    if (c) {
+                        gen_helper_crc32c(tmp, tmp, tmp2, tmp3);
+                    } else {
+                        gen_helper_crc32(tmp, tmp, tmp2, tmp3);
+                    }
+                    tcg_temp_free_i32(tmp2);
+                    tcg_temp_free_i32(tmp3);
+                    break;
+                }
                 default:
                     goto illegal_op;
                 }
-- 
1.8.1.4

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [Qemu-devel] [PATCH 1/3] include/qemu/crc32c.h: Rename include guards to match filename
  2014-02-17 17:19 ` [Qemu-devel] [PATCH 1/3] include/qemu/crc32c.h: Rename include guards to match filename Will Newton
@ 2014-02-17 17:22   ` Peter Maydell
  0 siblings, 0 replies; 6+ messages in thread
From: Peter Maydell @ 2014-02-17 17:22 UTC (permalink / raw)
  To: Will Newton; +Cc: QEMU Developers

On 17 February 2014 17:19, Will Newton <will.newton@linaro.org> wrote:
> Signed-off-by: Will Newton <will.newton@linaro.org>
> ---
>  include/qemu/crc32c.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/include/qemu/crc32c.h b/include/qemu/crc32c.h
> index 56d1c3b..dafb6a1 100644
> --- a/include/qemu/crc32c.h
> +++ b/include/qemu/crc32c.h
> @@ -25,8 +25,8 @@
>   *
>   */
>
> -#ifndef QEMU_CRC32_H
> -#define QEMU_CRC32_H
> +#ifndef QEMU_CRC32C_H
> +#define QEMU_CRC32C_H
>
>  #include "qemu-common.h"

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

-- PMM

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [Qemu-devel] [PATCH 2/3] util/crc32.c: Add CRC-32 implementation
  2014-02-17 17:19 ` [Qemu-devel] [PATCH 2/3] util/crc32.c: Add CRC-32 implementation Will Newton
@ 2014-02-17 17:29   ` Peter Maydell
  0 siblings, 0 replies; 6+ messages in thread
From: Peter Maydell @ 2014-02-17 17:29 UTC (permalink / raw)
  To: Will Newton; +Cc: QEMU Developers

On 17 February 2014 17:19, Will Newton <will.newton@linaro.org> wrote:
> Add a table-driven CRC-32 implementation similar in style to the
> existing CRC-32C implementation.

> +++ b/include/qemu/crc32.h
> @@ -0,0 +1,15 @@
> +/*
> + *  CRC32C Checksum Algorithm
> + *
> + *  Polynomial: 0x04C11DB7
> + *
> + */
> +
> +#ifndef QEMU_CRC32_H
> +#define QEMU_CRC32_H
> +
> +#include "qemu-common.h"
> +
> +uint32_t crc32(uint32_t crc, const uint8_t *data, unsigned int length);

This seems like a bad idea because we have quite a bit
of code in QEMU which uses crc32() from zlib.h.

Is it possible to just use that implementation?

thanks
-- PMM

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2014-02-17 17:29 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-02-17 17:19 [Qemu-devel] [PATCH 0/3] target-arm: Add support for AArch32 ARMv8 CRC32 instructions Will Newton
2014-02-17 17:19 ` [Qemu-devel] [PATCH 1/3] include/qemu/crc32c.h: Rename include guards to match filename Will Newton
2014-02-17 17:22   ` Peter Maydell
2014-02-17 17:19 ` [Qemu-devel] [PATCH 2/3] util/crc32.c: Add CRC-32 implementation Will Newton
2014-02-17 17:29   ` Peter Maydell
2014-02-17 17:19 ` [Qemu-devel] [PATCH 3/3] target-arm: Add support for AArch32 ARMv8 CRC32 instructions Will Newton

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