From: Beniamino Galvani <b.galvani@gmail.com>
To: qemu-devel@nongnu.org
Cc: Beniamino Galvani <b.galvani@gmail.com>,
Peter Maydell <peter.maydell@linaro.org>,
Peter Crosthwaite <peter.crosthwaite@xilinx.com>,
Li Guang <lig.fnst@cn.fujitsu.com>
Subject: [Qemu-devel] [PATCH 2/7] allwinner-a10-pic: fix interrupt clear behaviour
Date: Mon, 17 Feb 2014 18:43:18 +0100 [thread overview]
Message-ID: <1392659003-8264-3-git-send-email-b.galvani@gmail.com> (raw)
In-Reply-To: <1392659003-8264-1-git-send-email-b.galvani@gmail.com>
According to this mail thread [1], writing to pending register seems
to have no effect on actual pending status of interrupts. This means
that the only way to clear a pending interrupt is to clear the
interrupt source. This patch implements such behaviour.
[1] http://lkml.org/lkml/2013/7/6/59
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
---
hw/intc/allwinner-a10-pic.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/intc/allwinner-a10-pic.c b/hw/intc/allwinner-a10-pic.c
index bb2351f..afd57ef 100644
--- a/hw/intc/allwinner-a10-pic.c
+++ b/hw/intc/allwinner-a10-pic.c
@@ -49,6 +49,8 @@ static void aw_a10_pic_set_irq(void *opaque, int irq, int level)
if (level) {
set_bit(irq % 32, (void *)&s->irq_pending[irq / 32]);
+ } else {
+ clear_bit(irq % 32, (void *)&s->irq_pending[irq / 32]);
}
aw_a10_pic_update(s);
}
@@ -105,10 +107,10 @@ static void aw_a10_pic_write(void *opaque, hwaddr offset, uint64_t value,
s->nmi = value;
break;
case AW_A10_PIC_IRQ_PENDING ... AW_A10_PIC_IRQ_PENDING + 8:
- s->irq_pending[index] &= ~value;
+ /* Nothing to do */
break;
case AW_A10_PIC_FIQ_PENDING ... AW_A10_PIC_FIQ_PENDING + 8:
- s->fiq_pending[index] &= ~value;
+ /* Ditto */
break;
case AW_A10_PIC_SELECT ... AW_A10_PIC_SELECT + 8:
s->select[index] = value;
--
1.7.10.4
next prev parent reply other threads:[~2014-02-17 17:44 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-17 17:43 [Qemu-devel] [PATCH 0/7] Allwinner A10 fixes Beniamino Galvani
2014-02-17 17:43 ` [Qemu-devel] [PATCH 1/7] allwinner-a10-pic: set vector address when an interrupt is pending Beniamino Galvani
2014-02-18 3:27 ` Li Guang
2014-02-18 23:17 ` Beniamino Galvani
2014-02-17 17:43 ` Beniamino Galvani [this message]
2014-02-18 3:49 ` [Qemu-devel] [PATCH 2/7] allwinner-a10-pic: fix interrupt clear behaviour Li Guang
2014-02-18 23:22 ` Beniamino Galvani
2014-02-19 2:02 ` Li Guang
2014-02-22 14:20 ` Beniamino Galvani
2014-02-24 6:45 ` Li Guang
2014-02-24 22:50 ` Beniamino Galvani
2014-02-25 1:08 ` Li Guang
2014-02-17 17:43 ` [Qemu-devel] [PATCH 3/7] allwinner-a10-pit: avoid generation of spurious interrupts Beniamino Galvani
2014-02-18 4:17 ` Li Guang
2014-02-18 23:26 ` Beniamino Galvani
2014-02-19 1:58 ` Li Guang
2014-02-17 17:43 ` [Qemu-devel] [PATCH 4/7] allwinner-a10-pit: use level triggered interrupts Beniamino Galvani
2014-02-18 3:51 ` Li Guang
2014-02-18 23:29 ` Beniamino Galvani
2014-02-17 17:43 ` [Qemu-devel] [PATCH 5/7] allwinner-a10-pit: implement prescaler and source selection Beniamino Galvani
2014-02-17 17:43 ` [Qemu-devel] [PATCH 6/7] allwinner-emac: set autonegotiation complete bit on link up Beniamino Galvani
2014-02-17 17:43 ` [Qemu-devel] [PATCH 7/7] allwinner-emac: update irq status after writes to interrupt registers Beniamino Galvani
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