From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40580) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WFSF5-00044o-OP for qemu-devel@nongnu.org; Mon, 17 Feb 2014 12:44:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WFSEx-0004DM-CK for qemu-devel@nongnu.org; Mon, 17 Feb 2014 12:44:31 -0500 Received: from mail-ea0-x22b.google.com ([2a00:1450:4013:c01::22b]:47017) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WFSEw-0004Cd-31 for qemu-devel@nongnu.org; Mon, 17 Feb 2014 12:44:23 -0500 Received: by mail-ea0-f171.google.com with SMTP id f15so7317262eak.2 for ; Mon, 17 Feb 2014 09:44:16 -0800 (PST) From: Beniamino Galvani Date: Mon, 17 Feb 2014 18:43:21 +0100 Message-Id: <1392659003-8264-6-git-send-email-b.galvani@gmail.com> In-Reply-To: <1392659003-8264-1-git-send-email-b.galvani@gmail.com> References: <1392659003-8264-1-git-send-email-b.galvani@gmail.com> Subject: [Qemu-devel] [PATCH 5/7] allwinner-a10-pit: implement prescaler and source selection List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Beniamino Galvani , Peter Maydell , Peter Crosthwaite , Li Guang This implements the prescaler and source fields of the timer control register as described in the A10 user manual. Signed-off-by: Beniamino Galvani --- hw/timer/allwinner-a10-pit.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/hw/timer/allwinner-a10-pit.c b/hw/timer/allwinner-a10-pit.c index 4723b25..f2f2567 100644 --- a/hw/timer/allwinner-a10-pit.c +++ b/hw/timer/allwinner-a10-pit.c @@ -79,6 +79,23 @@ static uint64_t a10_pit_read(void *opaque, hwaddr offset, unsigned size) return 0; } +static void a10_pit_set_freq(AwA10PITState *s, int index) +{ + uint32_t prescaler, source; + uint32_t source_freqs[] = {32768, 24000000}; + + prescaler = 1 << extract32(s->control[index], 4, 3); + source = extract32(s->control[index], 2, 2); + + if (source > 1) { + qemu_log_mask(LOG_UNIMP, "%s: unimplemented clock source %d", + __func__, source); + source = 0; + } + + ptimer_set_freq(s->timer[index], source_freqs[source] / prescaler); +} + static void a10_pit_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { @@ -101,6 +118,7 @@ static void a10_pit_write(void *opaque, hwaddr offset, uint64_t value, switch (offset & 0x0f) { case AW_A10_PIT_TIMER_CONTROL: s->control[index] = value; + a10_pit_set_freq(s, index); if (s->control[index] & AW_A10_PIT_TIMER_RELOAD) { ptimer_set_count(s->timer[index], s->interval[index]); } @@ -244,7 +262,6 @@ static void a10_pit_init(Object *obj) tc->index = i; bh[i] = qemu_bh_new(a10_pit_timer_cb, tc); s->timer[i] = ptimer_init(bh[i]); - ptimer_set_freq(s->timer[i], 240000); } } -- 1.7.10.4