From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58887) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WGReh-00042z-C3 for qemu-devel@nongnu.org; Thu, 20 Feb 2014 06:19:04 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WGReg-0004xR-89 for qemu-devel@nongnu.org; Thu, 20 Feb 2014 06:19:03 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:46035) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WGReg-0004wV-2f for qemu-devel@nongnu.org; Thu, 20 Feb 2014 06:19:02 -0500 From: Peter Maydell Date: Thu, 20 Feb 2014 11:17:05 +0000 Message-Id: <1392895054-13232-2-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1392895054-13232-1-git-send-email-peter.maydell@linaro.org> References: <1392895054-13232-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PULL 01/30] hw/intc/arm_gic: Fix NVIC assertion failure List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: Blue Swirl , qemu-devel@nongnu.org, Aurelien Jarno Commit 40d225009ef accidentally changed the behaviour of gic_acknowledge_irq() for the NVIC. The NVIC doesn't have SGIs, so this meant we hit an assertion: gic_acknowledge_irq: Assertion `s->sgi_pending[irq][cpu] != 0' failed. Return NVIC acknowledge-irq to its previous behaviour, like 11MPCore. Signed-off-by: Peter Maydell Reviewed-by: Christoffer Dall --- hw/intc/arm_gic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 93eaa6b..955b8d4 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -189,7 +189,7 @@ uint32_t gic_acknowledge_irq(GICState *s, int cpu) } s->last_active[irq][cpu] = s->running_irq[cpu]; - if (s->revision == REV_11MPCORE) { + if (s->revision == REV_11MPCORE || s->revision == REV_NVIC) { /* Clear pending flags for both level and edge triggered interrupts. * Level triggered IRQs will be reasserted once they become inactive. */ -- 1.8.5