From: Peter Maydell <peter.maydell@linaro.org>
To: Anthony Liguori <aliguori@amazon.com>
Cc: Blue Swirl <blauwirbel@gmail.com>,
qemu-devel@nongnu.org, Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PULL 41/45] dma/pl330: printf format type sweep.
Date: Wed, 26 Feb 2014 18:02:31 +0000 [thread overview]
Message-ID: <1393437755-23586-42-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1393437755-23586-1-git-send-email-peter.maydell@linaro.org>
From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Use PRI formats as appropriate rather than raw %x and %d. This fixes
debug printfery on some host platforms. Fix types of debug only
variables as appropriate.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: dbb5f5fd048b2d4a3cb5c6357577d11211a7a585.1393372019.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/dma/pl330.c | 26 ++++++++++++++------------
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c
index d36f0bc..a4cc6f9 100644
--- a/hw/dma/pl330.c
+++ b/hw/dma/pl330.c
@@ -577,7 +577,7 @@ static inline void pl330_queue_remove_tagged(PL330Queue *s, uint8_t tag)
static inline void pl330_fault(PL330Chan *ch, uint32_t flags)
{
- DB_PRINT("ch: %p, flags: %x\n", ch, flags);
+ DB_PRINT("ch: %p, flags: %" PRIx32 "\n", ch, flags);
ch->fault_type |= flags;
if (ch->state == pl330_chan_fault) {
return;
@@ -723,7 +723,8 @@ static void pl330_dmald(PL330Chan *ch, uint8_t opcode, uint8_t *args, int len)
ch->stall = pl330_queue_put_insn(&ch->parent->read_queue, ch->src,
size, num, inc, 0, ch->tag);
if (!ch->stall) {
- DB_PRINT("channel:%d address:%08x size:%d num:%d %c\n",
+ DB_PRINT("channel:%" PRId8 " address:%08" PRIx32 " size:%" PRIx32
+ " num:%" PRId32 " %c\n",
ch->tag, ch->src, size, num, inc ? 'Y' : 'N');
ch->src += inc ? size * num - (ch->src & (size - 1)) : 0;
}
@@ -868,7 +869,7 @@ static void pl330_dmasev(PL330Chan *ch, uint8_t opcode, uint8_t *args, int len)
}
if (ch->parent->inten & (1 << ev_id)) {
ch->parent->int_status |= (1 << ev_id);
- DB_PRINT("event interrupt raised %d\n", ev_id);
+ DB_PRINT("event interrupt raised %" PRId8 "\n", ev_id);
qemu_irq_raise(ch->parent->irq[ev_id]);
}
ch->parent->ev_status |= (1 << ev_id);
@@ -895,7 +896,8 @@ static void pl330_dmast(PL330Chan *ch, uint8_t opcode, uint8_t *args, int len)
ch->stall = pl330_queue_put_insn(&ch->parent->write_queue, ch->dst,
size, num, inc, 0, ch->tag);
if (!ch->stall) {
- DB_PRINT("channel:%d address:%08x size:%d num:%d %c\n",
+ DB_PRINT("channel:%" PRId8 " address:%08" PRIx32 " size:%" PRIx32
+ " num:%" PRId32 " %c\n",
ch->tag, ch->dst, size, num, inc ? 'Y' : 'N');
ch->dst += inc ? size * num - (ch->dst & (size - 1)) : 0;
}
@@ -1154,7 +1156,7 @@ static int pl330_exec_cycle(PL330Chan *channel)
dma_memory_read(&address_space_memory, q->addr, buf, len);
if (PL330_ERR_DEBUG > 1) {
- DB_PRINT("PL330 read from memory @%08x (size = %08x):\n",
+ DB_PRINT("PL330 read from memory @%08" PRIx32 " (size = %08x):\n",
q->addr, len);
qemu_hexdump((char *)buf, stderr, "", len);
}
@@ -1186,8 +1188,8 @@ static int pl330_exec_cycle(PL330Chan *channel)
if (fifo_res == PL330_FIFO_OK || q->z) {
dma_memory_write(&address_space_memory, q->addr, buf, len);
if (PL330_ERR_DEBUG > 1) {
- DB_PRINT("PL330 read from memory @%08x (size = %08x):\n",
- q->addr, len);
+ DB_PRINT("PL330 read from memory @%08" PRIx32
+ " (size = %08x):\n", q->addr, len);
qemu_hexdump((char *)buf, stderr, "", len);
}
if (q->inc) {
@@ -1276,7 +1278,7 @@ static void pl330_debug_exec(PL330State *s)
args[2] = (s->dbg[1] >> 8) & 0xff;
args[3] = (s->dbg[1] >> 16) & 0xff;
args[4] = (s->dbg[1] >> 24) & 0xff;
- DB_PRINT("chan id: %d\n", chan_id);
+ DB_PRINT("chan id: %" PRIx8 "\n", chan_id);
if (s->dbg[0] & 1) {
ch = &s->chan[chan_id];
} else {
@@ -1466,8 +1468,8 @@ static inline uint32_t pl330_iomem_read_imp(void *opaque,
static uint64_t pl330_iomem_read(void *opaque, hwaddr offset,
unsigned size)
{
- int ret = pl330_iomem_read_imp(opaque, offset);
- DB_PRINT("addr: %08x data: %08x\n", (unsigned)offset, ret);
+ uint32_t ret = pl330_iomem_read_imp(opaque, offset);
+ DB_PRINT("addr: %08" HWADDR_PRIx " data: %08" PRIx32 "\n", offset, ret);
return ret;
}
@@ -1553,7 +1555,7 @@ static void pl330_realize(DeviceState *dev, Error **errp)
s->cfg[1] |= 5;
break;
default:
- error_setg(errp, "Bad value for i-cache_len property: %d\n",
+ error_setg(errp, "Bad value for i-cache_len property: %" PRIx8 "\n",
s->i_cache_len);
return;
}
@@ -1588,7 +1590,7 @@ static void pl330_realize(DeviceState *dev, Error **errp)
s->cfg[CFG_CRD] |= 0x4;
break;
default:
- error_setg(errp, "Bad value for data_width property: %d\n",
+ error_setg(errp, "Bad value for data_width property: %" PRIx8 "\n",
s->data_width);
return;
}
--
1.9.0
next prev parent reply other threads:[~2014-02-26 18:02 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-26 18:01 [Qemu-devel] [PULL 00/45] target-arm queue Peter Maydell
2014-02-26 18:01 ` [Qemu-devel] [PULL 01/45] hw/misc/arm_sysctl: Fix bad boundary check on mb clock accesses Peter Maydell
2014-02-26 18:01 ` [Qemu-devel] [PULL 02/45] hw/net/stellaris_enet: Avoid unintended sign extension Peter Maydell
2014-02-26 18:01 ` [Qemu-devel] [PULL 03/45] hw/timer/arm_timer: Avoid array overrun for bad addresses Peter Maydell
2014-02-26 18:01 ` [Qemu-devel] [PULL 04/45] target-arm: Fix incorrect arithmetic constructing short-form PAR for ATS ops Peter Maydell
2014-02-26 18:01 ` [Qemu-devel] [PULL 05/45] hw/intc/exynos4210_combiner: Don't overrun output_irq array in init Peter Maydell
2014-02-26 18:01 ` [Qemu-devel] [PULL 06/45] hw/arm/musicpal: Remove nonexistent CDTP2, CDTP3 registers Peter Maydell
2014-02-26 18:01 ` [Qemu-devel] [PULL 07/45] target-arm: Load correct access bits from ARMv5 level 2 page table descriptors Peter Maydell
2014-02-26 18:01 ` [Qemu-devel] [PULL 08/45] hw/intc/arm_gic: Fix GIC_SET_LEVEL Peter Maydell
2014-02-26 18:01 ` [Qemu-devel] [PULL 09/45] linux-headers: Update from v3.14-rc3 Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 10/45] kvm: Introduce kvm_arch_irqchip_create Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 11/45] kvm: Common device control API functions Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 12/45] arm: vgic device control api support Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 13/45] hw: arm_gic_kvm: Add KVM VGIC save/restore logic Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 14/45] target-arm: Fix raw read and write functions on AArch64 registers Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 15/45] target-arm: A64: Make cache ID registers visible to AArch64 Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 16/45] target-arm: Implement AArch64 CurrentEL sysreg Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 17/45] target-arm: Implement AArch64 MIDR_EL1 Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 18/45] target-arm: Implement AArch64 cache invalidate/clean ops Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 19/45] target-arm: Implement AArch64 TLB invalidate ops Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 20/45] target-arm: Implement AArch64 dummy MDSCR_EL1 Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 21/45] target-arm: Implement AArch64 memory attribute registers Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 22/45] target-arm: Implement AArch64 SCTLR_EL1 Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 23/45] target-arm: Implement AArch64 TCR_EL1 Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 24/45] target-arm: Implement AArch64 VBAR_EL1 Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 25/45] target-arm: Implement AArch64 TTBR* Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 26/45] target-arm: Implement AArch64 MPIDR Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 27/45] target-arm: Implement AArch64 generic timers Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 28/45] target-arm: Implement AArch64 ID and feature registers Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 29/45] target-arm: Implement AArch64 dummy breakpoint and watchpoint registers Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 30/45] target-arm: Implement AArch64 OSLAR_EL1 sysreg as WI Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 31/45] target-arm: Get MMU index information correct for A64 code Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 32/45] target-arm: A64: Implement WFI Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 33/45] target-arm: Store AIF bits in env->pstate for AArch32 Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 34/45] target-arm: A64: Implement MSR (immediate) instructions Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 35/45] target-arm: Implement AArch64 view of CPACR Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 36/45] target-arm: Add utility function for checking AA32/64 state of an EL Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 37/45] include/qemu/crc32c.h: Rename include guards to match filename Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 38/45] target-arm: Add support for AArch32 ARMv8 CRC32 instructions Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 39/45] dma/pl330: Delete overly verbose debug printf Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 40/45] dma/pl330: Fix misleading type Peter Maydell
2014-02-26 18:02 ` Peter Maydell [this message]
2014-02-26 18:02 ` [Qemu-devel] [PULL 42/45] dma/pl330: Rename parent_obj Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 43/45] dma/pl330: Add event debugging printfs Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 44/45] dma/pl330: Fix buffer depth Peter Maydell
2014-02-26 18:02 ` [Qemu-devel] [PULL 45/45] dma/pl330: implement dmaadnh instruction Peter Maydell
2014-02-27 11:33 ` [Qemu-devel] [PULL 00/45] target-arm queue Peter Maydell
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