From: Rob Herring <robherring2@gmail.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Christoffer Dall <christoffer.dall@linaro.org>,
Rob Herring <rob.herring@linaro.org>
Subject: [Qemu-devel] [PATCH] pl011: fix corrupting the UARTCR value
Date: Thu, 27 Feb 2014 19:37:21 -0600 [thread overview]
Message-ID: <1393551441-18041-1-git-send-email-robherring2@gmail.com> (raw)
From: Rob Herring <rob.herring@linaro.org>
Offset 4 is UARTRSR/UARTECR, not the UARTCR. As framing and parity errors
will never occur, we can ignore writes to this register.
Signed-off-by: Rob Herring <rob.herring@linaro.org>
---
hw/char/pl011.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index a8ae6f4..8ced7cd 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -146,8 +146,8 @@ static void pl011_write(void *opaque, hwaddr offset,
s->int_level |= PL011_INT_TX;
pl011_update(s);
break;
- case 1: /* UARTCR */
- s->cr = value;
+ case 1: /* UARTRSR/UARTECR */
+ /* Writes to Rx Status / Error Clear register are ignored. */
break;
case 6: /* UARTFR */
/* Writes to Flag register are ignored. */
--
1.8.3.2
next reply other threads:[~2014-02-28 1:37 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-28 1:37 Rob Herring [this message]
2014-02-28 10:41 ` [Qemu-devel] [PATCH] pl011: fix corrupting the UARTCR value Peter Maydell
2014-02-28 13:41 ` Rob Herring
2014-02-28 13:43 ` Peter Maydell
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