From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60578) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WJCOc-00023P-MP for qemu-devel@nongnu.org; Thu, 27 Feb 2014 20:37:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WJCOX-0003s2-Ak for qemu-devel@nongnu.org; Thu, 27 Feb 2014 20:37:50 -0500 Received: from mail-oa0-x233.google.com ([2607:f8b0:4003:c02::233]:49544) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WJCOX-0003rm-2d for qemu-devel@nongnu.org; Thu, 27 Feb 2014 20:37:45 -0500 Received: by mail-oa0-f51.google.com with SMTP id j17so3358580oag.24 for ; Thu, 27 Feb 2014 17:37:44 -0800 (PST) From: Rob Herring Date: Thu, 27 Feb 2014 19:37:21 -0600 Message-Id: <1393551441-18041-1-git-send-email-robherring2@gmail.com> Subject: [Qemu-devel] [PATCH] pl011: fix corrupting the UARTCR value List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Christoffer Dall , Rob Herring From: Rob Herring Offset 4 is UARTRSR/UARTECR, not the UARTCR. As framing and parity errors will never occur, we can ignore writes to this register. Signed-off-by: Rob Herring --- hw/char/pl011.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index a8ae6f4..8ced7cd 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -146,8 +146,8 @@ static void pl011_write(void *opaque, hwaddr offset, s->int_level |= PL011_INT_TX; pl011_update(s); break; - case 1: /* UARTCR */ - s->cr = value; + case 1: /* UARTRSR/UARTECR */ + /* Writes to Rx Status / Error Clear register are ignored. */ break; case 6: /* UARTFR */ /* Writes to Flag register are ignored. */ -- 1.8.3.2