From: Beniamino Galvani <b.galvani@gmail.com>
To: qemu-devel@nongnu.org
Cc: Beniamino Galvani <b.galvani@gmail.com>,
Peter Maydell <peter.maydell@linaro.org>,
Peter Crosthwaite <peter.crosthwaite@xilinx.com>,
Li Guang <lig.fnst@cn.fujitsu.com>
Subject: [Qemu-devel] [PATCH v2 5/7] allwinner-a10-pit: implement prescaler and source selection
Date: Sun, 2 Mar 2014 15:06:39 +0100 [thread overview]
Message-ID: <1393769202-4551-6-git-send-email-b.galvani@gmail.com> (raw)
In-Reply-To: <1393769202-4551-1-git-send-email-b.galvani@gmail.com>
This implements the prescaler and source fields of the timer control
register as described in the A10 user manual.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
---
hw/timer/allwinner-a10-pit.c | 19 ++++++++++++++++++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/hw/timer/allwinner-a10-pit.c b/hw/timer/allwinner-a10-pit.c
index 4723b25..f2f2567 100644
--- a/hw/timer/allwinner-a10-pit.c
+++ b/hw/timer/allwinner-a10-pit.c
@@ -79,6 +79,23 @@ static uint64_t a10_pit_read(void *opaque, hwaddr offset, unsigned size)
return 0;
}
+static void a10_pit_set_freq(AwA10PITState *s, int index)
+{
+ uint32_t prescaler, source;
+ uint32_t source_freqs[] = {32768, 24000000};
+
+ prescaler = 1 << extract32(s->control[index], 4, 3);
+ source = extract32(s->control[index], 2, 2);
+
+ if (source > 1) {
+ qemu_log_mask(LOG_UNIMP, "%s: unimplemented clock source %d",
+ __func__, source);
+ source = 0;
+ }
+
+ ptimer_set_freq(s->timer[index], source_freqs[source] / prescaler);
+}
+
static void a10_pit_write(void *opaque, hwaddr offset, uint64_t value,
unsigned size)
{
@@ -101,6 +118,7 @@ static void a10_pit_write(void *opaque, hwaddr offset, uint64_t value,
switch (offset & 0x0f) {
case AW_A10_PIT_TIMER_CONTROL:
s->control[index] = value;
+ a10_pit_set_freq(s, index);
if (s->control[index] & AW_A10_PIT_TIMER_RELOAD) {
ptimer_set_count(s->timer[index], s->interval[index]);
}
@@ -244,7 +262,6 @@ static void a10_pit_init(Object *obj)
tc->index = i;
bh[i] = qemu_bh_new(a10_pit_timer_cb, tc);
s->timer[i] = ptimer_init(bh[i]);
- ptimer_set_freq(s->timer[i], 240000);
}
}
--
1.7.10.4
next prev parent reply other threads:[~2014-03-02 14:07 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-02 14:06 [Qemu-devel] [PATCH v2 0/7] Allwinner A10 fixes Beniamino Galvani
2014-03-02 14:06 ` [Qemu-devel] [PATCH v2 1/7] allwinner-a10-pic: set vector address when an interrupt is pending Beniamino Galvani
2014-03-03 11:16 ` Peter Crosthwaite
2014-03-03 22:14 ` Beniamino Galvani
2014-03-02 14:06 ` [Qemu-devel] [PATCH v2 2/7] allwinner-a10-pic: update pending register when an irq is cleared Beniamino Galvani
2014-03-03 11:56 ` Peter Crosthwaite
2014-03-03 22:09 ` Beniamino Galvani
2014-03-02 14:06 ` [Qemu-devel] [PATCH v2 3/7] allwinner-a10-pit: avoid generation of spurious interrupts Beniamino Galvani
2014-03-03 11:08 ` Peter Crosthwaite
2014-03-03 22:16 ` Beniamino Galvani
2014-03-04 11:30 ` Peter Crosthwaite
2014-03-02 14:06 ` [Qemu-devel] [PATCH v2 4/7] allwinner-a10-pit: use level triggered interrupts Beniamino Galvani
2014-03-02 14:06 ` Beniamino Galvani [this message]
2014-03-03 10:57 ` [Qemu-devel] [PATCH v2 5/7] allwinner-a10-pit: implement prescaler and source selection Peter Crosthwaite
2014-03-03 22:25 ` Beniamino Galvani
2014-03-02 14:06 ` [Qemu-devel] [PATCH v2 6/7] allwinner-emac: set autonegotiation complete bit on link up Beniamino Galvani
2014-03-02 14:06 ` [Qemu-devel] [PATCH v2 7/7] allwinner-emac: update irq status after writes to interrupt registers Beniamino Galvani
2014-03-03 10:59 ` Peter Crosthwaite
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