From: Beniamino Galvani <b.galvani@gmail.com>
To: qemu-devel@nongnu.org
Cc: Beniamino Galvani <b.galvani@gmail.com>,
Peter Maydell <peter.maydell@linaro.org>,
Peter Crosthwaite <peter.crosthwaite@xilinx.com>,
Li Guang <lig.fnst@cn.fujitsu.com>
Subject: [Qemu-devel] [PATCH v2 6/7] allwinner-emac: set autonegotiation complete bit on link up
Date: Sun, 2 Mar 2014 15:06:40 +0100 [thread overview]
Message-ID: <1393769202-4551-7-git-send-email-b.galvani@gmail.com> (raw)
In-Reply-To: <1393769202-4551-1-git-send-email-b.galvani@gmail.com>
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
---
hw/net/allwinner_emac.c | 4 ++--
include/hw/net/allwinner_emac.h | 1 +
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/net/allwinner_emac.c b/hw/net/allwinner_emac.c
index 469f2f0..91931ac 100644
--- a/hw/net/allwinner_emac.c
+++ b/hw/net/allwinner_emac.c
@@ -27,11 +27,11 @@ static uint8_t padding[60];
static void mii_set_link(RTL8201CPState *mii, bool link_ok)
{
if (link_ok) {
- mii->bmsr |= MII_BMSR_LINK_ST;
+ mii->bmsr |= MII_BMSR_LINK_ST | MII_BMSR_AN_COMP;
mii->anlpar |= MII_ANAR_TXFD | MII_ANAR_10FD | MII_ANAR_10 |
MII_ANAR_CSMACD;
} else {
- mii->bmsr &= ~MII_BMSR_LINK_ST;
+ mii->bmsr &= ~(MII_BMSR_LINK_ST | MII_BMSR_AN_COMP);
mii->anlpar = MII_ANAR_TX;
}
}
diff --git a/include/hw/net/allwinner_emac.h b/include/hw/net/allwinner_emac.h
index a5e944a..5ae7717 100644
--- a/include/hw/net/allwinner_emac.h
+++ b/include/hw/net/allwinner_emac.h
@@ -144,6 +144,7 @@
#define MII_BMSR_10T_FD (1 << 12)
#define MII_BMSR_10T_HD (1 << 11)
#define MII_BMSR_MFPS (1 << 6)
+#define MII_BMSR_AN_COMP (1 << 5)
#define MII_BMSR_AUTONEG (1 << 3)
#define MII_BMSR_LINK_ST (1 << 2)
--
1.7.10.4
next prev parent reply other threads:[~2014-03-02 14:07 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-02 14:06 [Qemu-devel] [PATCH v2 0/7] Allwinner A10 fixes Beniamino Galvani
2014-03-02 14:06 ` [Qemu-devel] [PATCH v2 1/7] allwinner-a10-pic: set vector address when an interrupt is pending Beniamino Galvani
2014-03-03 11:16 ` Peter Crosthwaite
2014-03-03 22:14 ` Beniamino Galvani
2014-03-02 14:06 ` [Qemu-devel] [PATCH v2 2/7] allwinner-a10-pic: update pending register when an irq is cleared Beniamino Galvani
2014-03-03 11:56 ` Peter Crosthwaite
2014-03-03 22:09 ` Beniamino Galvani
2014-03-02 14:06 ` [Qemu-devel] [PATCH v2 3/7] allwinner-a10-pit: avoid generation of spurious interrupts Beniamino Galvani
2014-03-03 11:08 ` Peter Crosthwaite
2014-03-03 22:16 ` Beniamino Galvani
2014-03-04 11:30 ` Peter Crosthwaite
2014-03-02 14:06 ` [Qemu-devel] [PATCH v2 4/7] allwinner-a10-pit: use level triggered interrupts Beniamino Galvani
2014-03-02 14:06 ` [Qemu-devel] [PATCH v2 5/7] allwinner-a10-pit: implement prescaler and source selection Beniamino Galvani
2014-03-03 10:57 ` Peter Crosthwaite
2014-03-03 22:25 ` Beniamino Galvani
2014-03-02 14:06 ` Beniamino Galvani [this message]
2014-03-02 14:06 ` [Qemu-devel] [PATCH v2 7/7] allwinner-emac: update irq status after writes to interrupt registers Beniamino Galvani
2014-03-03 10:59 ` Peter Crosthwaite
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