From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33721) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WKsm3-00023t-QV for qemu-devel@nongnu.org; Tue, 04 Mar 2014 12:05:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WKslr-0001ld-3l for qemu-devel@nongnu.org; Tue, 04 Mar 2014 12:04:59 -0500 Received: from mail-qc0-x22e.google.com ([2607:f8b0:400d:c01::22e]:42201) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WKslq-0001lZ-Vj for qemu-devel@nongnu.org; Tue, 04 Mar 2014 12:04:47 -0500 Received: by mail-qc0-f174.google.com with SMTP id x13so5578938qcv.19 for ; Tue, 04 Mar 2014 09:04:46 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Tue, 4 Mar 2014 09:04:02 -0800 Message-Id: <1393952650-16802-3-git-send-email-rth@twiddle.net> In-Reply-To: <1393952650-16802-1-git-send-email-rth@twiddle.net> References: <1393952650-16802-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 02/10] tcg-aarch64: Remove redundant CPU_TLB_ENTRY_BITS check List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Claudio Fontana Removed from other targets in 56bbc2f967ce185fa1c5c39e1aeb5b68b26242e9. Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c index 04d7ae3..efbeac7 100644 --- a/tcg/aarch64/tcg-target.c +++ b/tcg/aarch64/tcg-target.c @@ -1441,12 +1441,6 @@ static const TCGTargetOpDef aarch64_op_defs[] = { static void tcg_target_init(TCGContext *s) { -#if !defined(CONFIG_USER_ONLY) - /* fail safe */ - if ((1ULL << CPU_TLB_ENTRY_BITS) != sizeof(CPUTLBEntry)) { - tcg_abort(); - } -#endif tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff); tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff); -- 1.8.5.3