From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52903) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WLGI5-00053l-Dm for qemu-devel@nongnu.org; Wed, 05 Mar 2014 13:11:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WLGHz-0007RR-F9 for qemu-devel@nongnu.org; Wed, 05 Mar 2014 13:11:37 -0500 Received: from mail-qc0-x235.google.com ([2607:f8b0:400d:c01::235]:63677) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WLGHz-0007RI-9D for qemu-devel@nongnu.org; Wed, 05 Mar 2014 13:11:31 -0500 Received: by mail-qc0-f181.google.com with SMTP id e9so1533636qcy.26 for ; Wed, 05 Mar 2014 10:11:30 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Wed, 5 Mar 2014 10:11:11 -0800 Message-Id: <1394043081-4668-2-git-send-email-rth@twiddle.net> In-Reply-To: <1394043081-4668-1-git-send-email-rth@twiddle.net> References: <1394043081-4668-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 01/11] tcg-sparc: Fix ld64 for 32-bit mode List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: blauwirbel@gmail.com Since were not using an annulled branch, we need to put a nop in the delay slot. Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index cbd1c91..b459886 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -963,6 +963,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int sizeop) label_ptr[0] = (uint32_t *)s->code_ptr; tcg_out_bpcc0(s, COND_NE, BPCC_PN | (TARGET_LONG_BITS == 64 ? BPCC_XCC : BPCC_ICC), 0); + tcg_out_nop(s); /* TLB Hit. */ /* Load all 64-bits into an O/G register. */ -- 1.8.5.3