From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53017) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WLGIH-0005CN-UD for qemu-devel@nongnu.org; Wed, 05 Mar 2014 13:11:55 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WLGIC-0007VN-3q for qemu-devel@nongnu.org; Wed, 05 Mar 2014 13:11:49 -0500 Received: from mail-qc0-x22d.google.com ([2607:f8b0:400d:c01::22d]:44054) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WLGIB-0007VG-VO for qemu-devel@nongnu.org; Wed, 05 Mar 2014 13:11:44 -0500 Received: by mail-qc0-f173.google.com with SMTP id r5so1533690qcx.4 for ; Wed, 05 Mar 2014 10:11:43 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Wed, 5 Mar 2014 10:11:17 -0800 Message-Id: <1394043081-4668-8-git-send-email-rth@twiddle.net> In-Reply-To: <1394043081-4668-1-git-send-email-rth@twiddle.net> References: <1394043081-4668-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 07/11] tcg-sparc: Improve tcg_out_movi List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: blauwirbel@gmail.com If bits 31:13 are zero, reduce the insn count by one. Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.c | 52 ++++++++++++++++++++++++++++++-------------------- 1 file changed, 31 insertions(+), 21 deletions(-) diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index 3ae014d..e5a5e02 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -384,37 +384,47 @@ static inline void tcg_out_movi_imm13(TCGContext *s, int ret, uint32_t arg) tcg_out_arithi(s, ret, TCG_REG_G0, arg, ARITH_OR); } -static inline void tcg_out_movi_imm32(TCGContext *s, int ret, uint32_t arg) +static void tcg_out_movi(TCGContext *s, TCGType type, + TCGReg ret, tcg_target_long arg) { - if (check_fit_tl(arg, 13)) + tcg_target_long hi, lo; + + /* A 13-bit constant sign-extended to 64-bits. */ + if (check_fit_tl(arg, 13)) { tcg_out_movi_imm13(s, ret, arg); - else { - tcg_out_sethi(s, ret, arg); - if (arg & 0x3ff) - tcg_out_arithi(s, ret, ret, arg & 0x3ff, ARITH_OR); + return; } -} -static inline void tcg_out_movi(TCGContext *s, TCGType type, - TCGReg ret, tcg_target_long arg) -{ - /* All 32-bit constants, as well as 64-bit constants with - no high bits set go through movi_imm32. */ + /* A 32-bit constant, or 32-bit zero-extended to 64-bits. */ if (TCG_TARGET_REG_BITS == 32 || type == TCG_TYPE_I32 - || (arg & ~(tcg_target_long)0xffffffff) == 0) { - tcg_out_movi_imm32(s, ret, arg); - } else if (check_fit_tl(arg, 13)) { - /* A 13-bit constant sign-extended to 64-bits. */ - tcg_out_movi_imm13(s, ret, arg); - } else if (check_fit_tl(arg, 32)) { - /* A 32-bit constant sign-extended to 64-bits. */ + || (arg & ~0xffffffffu) == 0) { + tcg_out_sethi(s, ret, arg); + if (arg & 0x3ff) { + tcg_out_arithi(s, ret, ret, arg & 0x3ff, ARITH_OR); + } + return; + } + + /* A 32-bit constant sign-extended to 64-bits. */ + if (check_fit_tl(arg, 32)) { tcg_out_sethi(s, ret, ~arg); tcg_out_arithi(s, ret, ret, (arg & 0x3ff) | -0x400, ARITH_XOR); + return; + } + + /* A 64-bit constant decomposed into 2 32-bit pieces. */ + lo = (int32_t)arg; + if (check_fit_tl(lo, 13)) { + hi = (arg - lo) >> 31 >> 1; + tcg_out_movi(s, TCG_TYPE_I32, ret, hi); + tcg_out_arithi(s, ret, ret, 32, SHIFT_SLLX); + tcg_out_arithi(s, ret, ret, lo, ARITH_ADD); } else { - tcg_out_movi_imm32(s, ret, arg >> (TCG_TARGET_REG_BITS / 2)); + hi = arg >> 31 >> 1; + tcg_out_movi(s, TCG_TYPE_I32, ret, hi); + tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_T2, lo); tcg_out_arithi(s, ret, ret, 32, SHIFT_SLLX); - tcg_out_movi_imm32(s, TCG_REG_T2, arg); tcg_out_arith(s, ret, ret, TCG_REG_T2, ARITH_OR); } } -- 1.8.5.3