From: James Hogan <james.hogan@imgtec.com>
To: qemu-devel@nongnu.org
Cc: James Hogan <james.hogan@imgtec.com>,
kvm@vger.kernel.org, Gleb Natapov <gleb@redhat.com>,
Sanjay Lal <sanjayl@kymasys.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH v3 3/9] target-mips: get_physical_address: Add defines for segment bases
Date: Thu, 6 Mar 2014 17:09:32 +0000 [thread overview]
Message-ID: <1394125778-18746-4-git-send-email-james.hogan@imgtec.com> (raw)
In-Reply-To: <1394125778-18746-1-git-send-email-james.hogan@imgtec.com>
Add preprocessor definitions for 32bit segment bases for use in
get_physical_address(). These will also be taken advantage of in the
next patch which adds KVM awareness.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
---
target-mips/helper.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/target-mips/helper.c b/target-mips/helper.c
index 33e0e88..2e96655 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -118,7 +118,13 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
qemu_log("user mode %d h %08x\n", user_mode, env->hflags);
#endif
- if (address <= (int32_t)0x7FFFFFFFUL) {
+#define USEG_LIMIT 0x7FFFFFFFUL
+#define KSEG0_BASE 0x80000000UL
+#define KSEG1_BASE 0xA0000000UL
+#define KSEG2_BASE 0xC0000000UL
+#define KSEG3_BASE 0xE0000000UL
+
+ if (address <= USEG_LIMIT) {
/* useg */
if (env->CP0_Status & (1 << CP0St_ERL)) {
*physical = address & 0xFFFFFFFF;
@@ -160,23 +166,23 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
ret = TLBRET_BADADDR;
}
#endif
- } else if (address < (int32_t)0xA0000000UL) {
+ } else if (address < (int32_t)KSEG1_BASE) {
/* kseg0 */
if (kernel_mode) {
- *physical = address - (int32_t)0x80000000UL;
+ *physical = address - (int32_t)KSEG0_BASE;
*prot = PAGE_READ | PAGE_WRITE;
} else {
ret = TLBRET_BADADDR;
}
- } else if (address < (int32_t)0xC0000000UL) {
+ } else if (address < (int32_t)KSEG2_BASE) {
/* kseg1 */
if (kernel_mode) {
- *physical = address - (int32_t)0xA0000000UL;
+ *physical = address - (int32_t)KSEG1_BASE;
*prot = PAGE_READ | PAGE_WRITE;
} else {
ret = TLBRET_BADADDR;
}
- } else if (address < (int32_t)0xE0000000UL) {
+ } else if (address < (int32_t)KSEG3_BASE) {
/* sseg (kseg2) */
if (supervisor_mode || kernel_mode) {
ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);
--
1.8.1.2
next prev parent reply other threads:[~2014-03-06 17:10 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-06 17:09 [Qemu-devel] [PATCH v3 0/9] KVM Support for MIPS32 Processors James Hogan
2014-03-06 17:09 ` [Qemu-devel] [PATCH v3 1/9] hw/mips/cputimer: Don't start periodic timer in KVM mode James Hogan
2014-03-06 17:09 ` [Qemu-devel] [PATCH v3 2/9] hw/mips: Add API to convert KVM guest KSEG0 <-> GPA James Hogan
2014-03-06 17:09 ` James Hogan [this message]
2014-03-06 17:09 ` [Qemu-devel] [PATCH v3 4/9] target-mips: get_physical_address: Add KVM awareness James Hogan
2014-03-06 17:09 ` [Qemu-devel] [PATCH v3 5/9] kvm: Allow arch to set sigmask length James Hogan
2014-03-06 17:09 ` [Qemu-devel] [PATCH v3 6/9] target-mips: kvm: Add main KVM support for MIPS James Hogan
2014-03-13 21:28 ` Andreas Färber
2014-03-13 22:35 ` Peter Maydell
2014-03-14 9:43 ` James Hogan
2014-03-14 12:53 ` Paolo Bonzini
2014-03-14 9:42 ` James Hogan
2014-03-06 17:09 ` [Qemu-devel] [PATCH v3 7/9] hw/mips: In KVM mode, inject IRQ2 (I/O) interupts via ioctls James Hogan
2014-03-13 21:30 ` Andreas Färber
2014-03-06 17:09 ` [Qemu-devel] [PATCH v3 8/9] hw/mips: malta: Add KVM support James Hogan
2014-03-06 17:09 ` [Qemu-devel] [PATCH v3 9/9] target-mips: Enable KVM support in build system James Hogan
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