From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58842) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WLhoU-0001Bm-Aa for qemu-devel@nongnu.org; Thu, 06 Mar 2014 18:35:32 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WLhny-0003OB-DU for qemu-devel@nongnu.org; Thu, 06 Mar 2014 18:34:54 -0500 From: Alexander Graf Date: Fri, 7 Mar 2014 00:33:39 +0100 Message-Id: <1394148857-19607-93-git-send-email-agraf@suse.de> In-Reply-To: <1394148857-19607-1-git-send-email-agraf@suse.de> References: <1394148857-19607-1-git-send-email-agraf@suse.de> Subject: [Qemu-devel] [PULL 092/130] target-ppc: Altivec 2.07: Update AVR Structure List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Tom Musta , blauwirbel@gmail.com, qemu-ppc@nongnu.org, aliguori@amazon.com, aurelien@aurel32.net From: Tom Musta This patch updates the ppc_avr_t data structure to include elements for signed 64-bit integers and (conditionally) unsigned 128 bit integers. These elements will be in instructions models later on in this patch series. Signed-off-by: Tom Musta Signed-off-by: Alexander Graf --- target-ppc/cpu.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 88c2788..7ccf4c6 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -352,6 +352,10 @@ union ppc_avr_t { int16_t s16[8]; int32_t s32[4]; uint64_t u64[2]; + int64_t s64[2]; +#ifdef CONFIG_INT128 + __uint128_t u128; +#endif }; #if !defined(CONFIG_USER_ONLY) -- 1.8.1.4