From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58860) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WLhoU-0001Co-PP for qemu-devel@nongnu.org; Thu, 06 Mar 2014 18:35:33 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WLhny-0003OZ-Hc for qemu-devel@nongnu.org; Thu, 06 Mar 2014 18:34:54 -0500 From: Alexander Graf Date: Fri, 7 Mar 2014 00:33:42 +0100 Message-Id: <1394148857-19607-96-git-send-email-agraf@suse.de> In-Reply-To: <1394148857-19607-1-git-send-email-agraf@suse.de> References: <1394148857-19607-1-git-send-email-agraf@suse.de> Subject: [Qemu-devel] [PULL 095/130] target-ppc: Altivec 2.07: Add Opcode Macro for VX Form Instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Tom Musta , blauwirbel@gmail.com, qemu-ppc@nongnu.org, aliguori@amazon.com, aurelien@aurel32.net From: Tom Musta This patch adds a macro to insert an entry into the opcode table for Altivec Power ISA Version 2.07 instructions. The macro is similar to the GEN_VXFORM macro except that it tags the entry with the PPC2_ALTIVEC_207 flag rather than PPC_ALTIVEC. Signed-off-by: Tom Musta Signed-off-by: Alexander Graf --- target-ppc/translate.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index ffcee7f..a55789f 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -10280,6 +10280,11 @@ GEN_VX_LOGICAL(vnor, tcg_gen_nor_i64, 2, 20), #undef GEN_VXFORM #define GEN_VXFORM(name, opc2, opc3) \ GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) + +#undef GEN_VXFORM_207 +#define GEN_VXFORM_207(name, opc2, opc3) \ +GEN_HANDLER_E(name, 0x04, opc2, opc3, 0x00000000, PPC_NONE, PPC2_ALTIVEC_207) + #undef GEN_VXFORM_DUAL #define GEN_VXFORM_DUAL(name0, name1, opc2, opc3, type0, type1) \ GEN_HANDLER_E(name0##_##name1, 0x4, opc2, opc3, 0x00000000, type0, type1) -- 1.8.1.4