From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58523) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WLmYJ-0000RA-5q for qemu-devel@nongnu.org; Thu, 06 Mar 2014 23:38:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WLmXy-0002Hv-RK for qemu-devel@nongnu.org; Thu, 06 Mar 2014 23:38:31 -0500 Received: from e23smtp08.au.ibm.com ([202.81.31.141]:35638) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WLmXr-0002Fz-Vh for qemu-devel@nongnu.org; Thu, 06 Mar 2014 23:38:10 -0500 Received: from /spool/local by e23smtp08.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 7 Mar 2014 14:37:46 +1000 From: Alexey Kardashevskiy Date: Fri, 7 Mar 2014 15:37:39 +1100 Message-Id: <1394167061-19317-2-git-send-email-aik@ozlabs.ru> In-Reply-To: <1394167061-19317-1-git-send-email-aik@ozlabs.ru> References: <1394167061-19317-1-git-send-email-aik@ozlabs.ru> Subject: [Qemu-devel] [PATCH v4 1/3] target-ppc: introduce powerisa-207-server flag List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Alexey Kardashevskiy , qemu-ppc@nongnu.org, Anton Blanchard , Alexander Graf This flag will be used to decide whether to emulate some bits of H_SET_MODE hypercall because some are POWER8-only. While we are here, add 2.05 flag to POWER8 family too. POWER7/7+ already have it. Signed-off-by: Alexey Kardashevskiy --- target-ppc/cpu.h | 2 ++ target-ppc/translate_init.c | 3 ++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index afab267..27a2cd9 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1900,6 +1900,8 @@ enum { PPC2_LSQ_ISA207 = 0x0000000000002000ULL, /* ISA 2.07 Altivec */ PPC2_ALTIVEC_207 = 0x0000000000004000ULL, + /* PowerISA 2.07 Book3s specification */ + PPC2_ISA207S = 0x0000000000008000ULL, #define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \ PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \ diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 3eafbb0..9f896eb 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7172,7 +7172,8 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 | - PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207; + PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 | + PPC2_ISA205 | PPC2_ISA207S; pcc->msr_mask = 0x800000000284FF36ULL; pcc->mmu_model = POWERPC_MMU_2_06; #if defined(CONFIG_SOFTMMU) -- 1.8.4.rc4