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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, aliguori@amazon.com
Subject: [Qemu-devel] [PULL 07/10] tcg-aarch64: Remove the shift_imm parameter from tcg_out_cmp
Date: Sat,  8 Mar 2014 21:30:40 -0800	[thread overview]
Message-ID: <1394343043-1473-8-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1394343043-1473-1-git-send-email-rth@twiddle.net>

It was unused.  Let's not overcomplicate things before we need them.

Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/aarch64/tcg-target.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c
index dca7632..2b55393 100644
--- a/tcg/aarch64/tcg-target.c
+++ b/tcg/aarch64/tcg-target.c
@@ -541,11 +541,10 @@ static inline void tcg_out_rotl(TCGContext *s, TCGType ext,
     tcg_out_extr(s, ext, rd, rn, rn, bits - (m & max));
 }
 
-static inline void tcg_out_cmp(TCGContext *s, TCGType ext, TCGReg rn,
-                               TCGReg rm, int shift_imm)
+static void tcg_out_cmp(TCGContext *s, TCGType ext, TCGReg rn, TCGReg rm)
 {
     /* Using CMP alias SUBS wzr, Wn, Wm */
-    tcg_out_arith(s, ARITH_SUBS, ext, TCG_REG_XZR, rn, rm, shift_imm);
+    tcg_out_arith(s, ARITH_SUBS, ext, TCG_REG_XZR, rn, rm, 0);
 }
 
 static inline void tcg_out_cset(TCGContext *s, TCGType ext,
@@ -903,7 +902,7 @@ static void tcg_out_tlb_read(TCGContext *s, TCGReg addr_reg,
                  (is_read ? offsetof(CPUTLBEntry, addr_read)
                   : offsetof(CPUTLBEntry, addr_write)));
     /* Perform the address comparison. */
-    tcg_out_cmp(s, (TARGET_LONG_BITS == 64), TCG_REG_X0, TCG_REG_X3, 0);
+    tcg_out_cmp(s, (TARGET_LONG_BITS == 64), TCG_REG_X0, TCG_REG_X3);
     *label_ptr = s->code_ptr;
     /* If not equal, we jump to the slow path. */
     tcg_out_goto_cond_noaddr(s, TCG_COND_NE);
@@ -1242,13 +1241,13 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
 
     case INDEX_op_brcond_i64:
     case INDEX_op_brcond_i32:
-        tcg_out_cmp(s, ext, a0, a1, 0);
+        tcg_out_cmp(s, ext, a0, a1);
         tcg_out_goto_label_cond(s, a2, args[3]);
         break;
 
     case INDEX_op_setcond_i64:
     case INDEX_op_setcond_i32:
-        tcg_out_cmp(s, ext, a1, a2, 0);
+        tcg_out_cmp(s, ext, a1, a2);
         tcg_out_cset(s, 0, a0, args[3]);
         break;
 
-- 
1.8.5.3

  parent reply	other threads:[~2014-03-09  5:31 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-09  5:30 [Qemu-devel] [PULL 00/10] tcg/aarch64 cleanups, part 1 Richard Henderson
2014-03-09  5:30 ` [Qemu-devel] [PULL 01/10] tcg-aarch64: Enable builtin disassembler Richard Henderson
2014-03-09  5:30 ` [Qemu-devel] [PULL 02/10] tcg-aarch64: Remove redundant CPU_TLB_ENTRY_BITS check Richard Henderson
2014-03-09  5:30 ` [Qemu-devel] [PULL 03/10] tcg-aarch64: Change all ext variables to TCGType Richard Henderson
2014-03-09  5:30 ` [Qemu-devel] [PULL 04/10] tcg-aarch64: Set ext based on TCG_OPF_64BIT Richard Henderson
2014-03-09  5:30 ` [Qemu-devel] [PULL 05/10] tcg-aarch64: Don't handle mov/movi in tcg_out_op Richard Henderson
2014-03-09  5:30 ` [Qemu-devel] [PULL 06/10] tcg-aarch64: Hoist common argument loads " Richard Henderson
2014-03-09  5:30 ` Richard Henderson [this message]
2014-03-09  5:30 ` [Qemu-devel] [PULL 08/10] tcg-aarch64: Use intptr_t apropriately Richard Henderson
2014-03-09  5:30 ` [Qemu-devel] [PULL 09/10] tcg-aarch64: Simplify tcg_out_ldst_9 encoding Richard Henderson
2014-03-09  5:30 ` [Qemu-devel] [PULL 10/10] tcg-aarch64: Remove nop from qemu_st slow path Richard Henderson
2014-03-10 12:56 ` [Qemu-devel] [PULL 00/10] tcg/aarch64 cleanups, part 1 Peter Maydell

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