From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42033) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WMntF-00012E-8V for qemu-devel@nongnu.org; Sun, 09 Mar 2014 20:16:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WMnt9-0005CP-66 for qemu-devel@nongnu.org; Sun, 09 Mar 2014 20:16:21 -0400 Received: from cantor2.suse.de ([195.135.220.15]:42245 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WMnt8-0005CG-Tc for qemu-devel@nongnu.org; Sun, 09 Mar 2014 20:16:15 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Mon, 10 Mar 2014 01:15:27 +0100 Message-Id: <1394410549-13751-19-git-send-email-afaerber@suse.de> In-Reply-To: <1394410549-13751-1-git-send-email-afaerber@suse.de> References: <1394410549-13751-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH qom-cpu v2 18/40] cpu: Move watchpoint fields from CPU_COMMON to CPUState List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Marcelo Tosatti , "open list:X86" , Gleb Natapov , Riku Voipio , Max Filippov , Michael Walle , pbonzini@redhat.com, =?UTF-8?q?Andreas=20F=C3=A4rber?= Signed-off-by: Andreas F=C3=A4rber --- cpu-exec.c | 5 +++-- exec.c | 33 ++++++++++++++++++++------------- gdbstub.c | 8 ++++---- include/exec/cpu-defs.h | 10 ---------- include/qom/cpu.h | 10 ++++++++++ linux-user/main.c | 5 +++-- target-i386/cpu.h | 2 +- target-i386/helper.c | 7 ++++--- target-i386/kvm.c | 8 ++++---- target-lm32/cpu.h | 2 +- target-lm32/helper.c | 7 ++++--- target-xtensa/cpu.h | 2 +- target-xtensa/helper.c | 8 +++++--- 13 files changed, 60 insertions(+), 47 deletions(-) diff --git a/cpu-exec.c b/cpu-exec.c index 798dc08..d7c21d3 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -200,10 +200,11 @@ void cpu_set_debug_excp_handler(CPUDebugExcpHandler= *handler) =20 static void cpu_handle_debug_exception(CPUArchState *env) { + CPUState *cpu =3D ENV_GET_CPU(env); CPUWatchpoint *wp; =20 - if (!env->watchpoint_hit) { - QTAILQ_FOREACH(wp, &env->watchpoints, entry) { + if (!cpu->watchpoint_hit) { + QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { wp->flags &=3D ~BP_WATCHPOINT_HIT; } } diff --git a/exec.c b/exec.c index 9b02c6a..cf4a0ef 100644 --- a/exec.c +++ b/exec.c @@ -485,7 +485,7 @@ void cpu_exec_init(CPUArchState *env) cpu->cpu_index =3D cpu_index; cpu->numa_node =3D 0; QTAILQ_INIT(&env->breakpoints); - QTAILQ_INIT(&env->watchpoints); + QTAILQ_INIT(&cpu->watchpoints); #ifndef CONFIG_USER_ONLY cpu->as =3D &address_space_memory; cpu->thread_id =3D qemu_get_thread_id(); @@ -542,6 +542,7 @@ int cpu_watchpoint_insert(CPUArchState *env, target_u= long addr, target_ulong len int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_u= long len, int flags, CPUWatchpoint **watchpoint) { + CPUState *cpu =3D ENV_GET_CPU(env); target_ulong len_mask =3D ~(len - 1); CPUWatchpoint *wp; =20 @@ -559,10 +560,11 @@ int cpu_watchpoint_insert(CPUArchState *env, target= _ulong addr, target_ulong len wp->flags =3D flags; =20 /* keep all GDB-injected watchpoints in front */ - if (flags & BP_GDB) - QTAILQ_INSERT_HEAD(&env->watchpoints, wp, entry); - else - QTAILQ_INSERT_TAIL(&env->watchpoints, wp, entry); + if (flags & BP_GDB) { + QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry); + } else { + QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry); + } =20 tlb_flush_page(env, addr); =20 @@ -575,10 +577,11 @@ int cpu_watchpoint_insert(CPUArchState *env, target= _ulong addr, target_ulong len int cpu_watchpoint_remove(CPUArchState *env, target_ulong addr, target_u= long len, int flags) { + CPUState *cpu =3D ENV_GET_CPU(env); target_ulong len_mask =3D ~(len - 1); CPUWatchpoint *wp; =20 - QTAILQ_FOREACH(wp, &env->watchpoints, entry) { + QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { if (addr =3D=3D wp->vaddr && len_mask =3D=3D wp->len_mask && flags =3D=3D (wp->flags & ~BP_WATCHPOINT_HIT)) { cpu_watchpoint_remove_by_ref(env, wp); @@ -591,7 +594,9 @@ int cpu_watchpoint_remove(CPUArchState *env, target_u= long addr, target_ulong len /* Remove a specific watchpoint by reference. */ void cpu_watchpoint_remove_by_ref(CPUArchState *env, CPUWatchpoint *watc= hpoint) { - QTAILQ_REMOVE(&env->watchpoints, watchpoint, entry); + CPUState *cpu =3D ENV_GET_CPU(env); + + QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry); =20 tlb_flush_page(env, watchpoint->vaddr); =20 @@ -601,9 +606,10 @@ void cpu_watchpoint_remove_by_ref(CPUArchState *env,= CPUWatchpoint *watchpoint) /* Remove all matching watchpoints. */ void cpu_watchpoint_remove_all(CPUArchState *env, int mask) { + CPUState *cpu =3D ENV_GET_CPU(env); CPUWatchpoint *wp, *next; =20 - QTAILQ_FOREACH_SAFE(wp, &env->watchpoints, entry, next) { + QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) { if (wp->flags & mask) cpu_watchpoint_remove_by_ref(env, wp); } @@ -799,6 +805,7 @@ hwaddr memory_region_section_get_iotlb(CPUArchState *= env, int prot, target_ulong *address) { + CPUState *cpu =3D ENV_GET_CPU(env); hwaddr iotlb; CPUWatchpoint *wp; =20 @@ -818,7 +825,7 @@ hwaddr memory_region_section_get_iotlb(CPUArchState *= env, =20 /* Make accesses to pages with watchpoints go via the watchpoint trap routines. */ - QTAILQ_FOREACH(wp, &env->watchpoints, entry) { + QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { if (vaddr =3D=3D (wp->vaddr & TARGET_PAGE_MASK)) { /* Avoid trapping reads of pages with a write breakpoint. */ if ((prot & PAGE_WRITE) || (wp->flags & BP_MEM_READ)) { @@ -1573,7 +1580,7 @@ static void check_watchpoint(int offset, int len_ma= sk, int flags) CPUWatchpoint *wp; int cpu_flags; =20 - if (env->watchpoint_hit) { + if (cpu->watchpoint_hit) { /* We re-entered the check after replacing the TB. Now raise * the debug interrupt so that is will trigger after the * current instruction. */ @@ -1581,12 +1588,12 @@ static void check_watchpoint(int offset, int len_= mask, int flags) return; } vaddr =3D (cpu->mem_io_vaddr & TARGET_PAGE_MASK) + offset; - QTAILQ_FOREACH(wp, &env->watchpoints, entry) { + QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { if ((vaddr =3D=3D (wp->vaddr & len_mask) || (vaddr & wp->len_mask) =3D=3D wp->vaddr) && (wp->flags & fl= ags)) { wp->flags |=3D BP_WATCHPOINT_HIT; - if (!env->watchpoint_hit) { - env->watchpoint_hit =3D wp; + if (!cpu->watchpoint_hit) { + cpu->watchpoint_hit =3D wp; tb_check_watchpoint(env); if (wp->flags & BP_STOP_BEFORE_ACCESS) { cpu->exception_index =3D EXCP_DEBUG; diff --git a/gdbstub.c b/gdbstub.c index c5ab73f..0176b3f 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -1204,8 +1204,8 @@ static void gdb_vm_state_change(void *opaque, int r= unning, RunState state) } switch (state) { case RUN_STATE_DEBUG: - if (env->watchpoint_hit) { - switch (env->watchpoint_hit->flags & BP_MEM_ACCESS) { + if (cpu->watchpoint_hit) { + switch (cpu->watchpoint_hit->flags & BP_MEM_ACCESS) { case BP_MEM_READ: type =3D "r"; break; @@ -1219,8 +1219,8 @@ static void gdb_vm_state_change(void *opaque, int r= unning, RunState state) snprintf(buf, sizeof(buf), "T%02xthread:%02x;%swatch:" TARGET_FMT_lx ";", GDB_SIGNAL_TRAP, cpu_index(cpu), type, - env->watchpoint_hit->vaddr); - env->watchpoint_hit =3D NULL; + (target_ulong)cpu->watchpoint_hit->vaddr); + cpu->watchpoint_hit =3D NULL; goto send_packet; } tb_flush(env); diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index be9569c..338b8cb 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -119,13 +119,6 @@ typedef struct CPUBreakpoint { QTAILQ_ENTRY(CPUBreakpoint) entry; } CPUBreakpoint; =20 -typedef struct CPUWatchpoint { - target_ulong vaddr; - target_ulong len_mask; - int flags; /* BP_* */ - QTAILQ_ENTRY(CPUWatchpoint) entry; -} CPUWatchpoint; - #define CPU_TEMP_BUF_NLONGS 128 #define CPU_COMMON = \ /* soft mmu support */ = \ @@ -134,8 +127,5 @@ typedef struct CPUWatchpoint { /* from this point: preserved by CPU reset */ = \ /* ice debug support */ = \ QTAILQ_HEAD(breakpoints_head, CPUBreakpoint) breakpoints; = \ - = \ - QTAILQ_HEAD(watchpoints_head, CPUWatchpoint) watchpoints; = \ - CPUWatchpoint *watchpoint_hit; = \ =20 #endif diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 4d1ea35..c7420e0 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -151,6 +151,13 @@ typedef struct icount_decr_u16 { } icount_decr_u16; #endif =20 +typedef struct CPUWatchpoint { + vaddr vaddr; + vaddr len_mask; + int flags; /* BP_* */ + QTAILQ_ENTRY(CPUWatchpoint) entry; +} CPUWatchpoint; + struct KVMState; struct kvm_run; =20 @@ -231,6 +238,9 @@ struct CPUState { int gdb_num_g_regs; QTAILQ_ENTRY(CPUState) node; =20 + QTAILQ_HEAD(watchpoints_head, CPUWatchpoint) watchpoints; + CPUWatchpoint *watchpoint_hit; + void *opaque; =20 /* In order to avoid passing too many arguments to the MMIO helpers, diff --git a/linux-user/main.c b/linux-user/main.c index 99220b3..3345a8f 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -3431,6 +3431,7 @@ void init_task_state(TaskState *ts) =20 CPUArchState *cpu_copy(CPUArchState *env) { + CPUState *cpu =3D ENV_GET_CPU(env); CPUArchState *new_env =3D cpu_init(cpu_model); #if defined(TARGET_HAS_ICE) CPUBreakpoint *bp; @@ -3446,12 +3447,12 @@ CPUArchState *cpu_copy(CPUArchState *env) Note: Once we support ptrace with hw-debug register access, make = sure BP_CPU break/watchpoints are handled correctly on clone. */ QTAILQ_INIT(&env->breakpoints); - QTAILQ_INIT(&env->watchpoints); + QTAILQ_INIT(&cpu->watchpoints); #if defined(TARGET_HAS_ICE) QTAILQ_FOREACH(bp, &env->breakpoints, entry) { cpu_breakpoint_insert(new_env, bp->pc, bp->flags, NULL); } - QTAILQ_FOREACH(wp, &env->watchpoints, entry) { + QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { cpu_watchpoint_insert(new_env, wp->vaddr, (~wp->len_mask) + 1, wp->flags, NULL); } diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 62641af..9060187 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -876,7 +876,7 @@ typedef struct CPUX86State { target_ulong dr[8]; /* debug registers */ union { CPUBreakpoint *cpu_breakpoint[4]; - CPUWatchpoint *cpu_watchpoint[4]; + struct CPUWatchpoint *cpu_watchpoint[4]; }; /* break/watchpoints for dr[0..3] */ uint32_t smbase; int old_exception; /* exception in flight */ diff --git a/target-i386/helper.c b/target-i386/helper.c index 6d9bd71..bd8da20 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -1088,11 +1088,12 @@ bool check_hw_breakpoints(CPUX86State *env, bool = force_dr6_update) =20 void breakpoint_handler(CPUX86State *env) { + CPUState *cs =3D CPU(x86_env_get_cpu(env)); CPUBreakpoint *bp; =20 - if (env->watchpoint_hit) { - if (env->watchpoint_hit->flags & BP_CPU) { - env->watchpoint_hit =3D NULL; + if (cs->watchpoint_hit) { + if (cs->watchpoint_hit->flags & BP_CPU) { + cs->watchpoint_hit =3D NULL; if (check_hw_breakpoints(env, false)) { raise_exception(env, EXCP01_DB); } else { diff --git a/target-i386/kvm.c b/target-i386/kvm.c index e555040..7a295f6 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -2277,13 +2277,13 @@ static int kvm_handle_debug(X86CPU *cpu, break; case 0x1: ret =3D EXCP_DEBUG; - env->watchpoint_hit =3D &hw_watchpoint; + cs->watchpoint_hit =3D &hw_watchpoint; hw_watchpoint.vaddr =3D hw_breakpoint[n].addr; hw_watchpoint.flags =3D BP_MEM_WRITE; break; case 0x3: ret =3D EXCP_DEBUG; - env->watchpoint_hit =3D &hw_watchpoint; + cs->watchpoint_hit =3D &hw_watchpoint; hw_watchpoint.vaddr =3D hw_breakpoint[n].addr; hw_watchpoint.flags =3D BP_MEM_ACCESS; break; @@ -2291,11 +2291,11 @@ static int kvm_handle_debug(X86CPU *cpu, } } } - } else if (kvm_find_sw_breakpoint(CPU(cpu), arch_info->pc)) { + } else if (kvm_find_sw_breakpoint(cs, arch_info->pc)) { ret =3D EXCP_DEBUG; } if (ret =3D=3D 0) { - cpu_synchronize_state(CPU(cpu)); + cpu_synchronize_state(cs); assert(env->exception_injected =3D=3D -1); =20 /* pass to guest */ diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h index b94d9b0..d50726b 100644 --- a/target-lm32/cpu.h +++ b/target-lm32/cpu.h @@ -167,7 +167,7 @@ struct CPULM32State { uint32_t wp[4]; /* watchpoints */ =20 CPUBreakpoint * cpu_breakpoint[4]; - CPUWatchpoint * cpu_watchpoint[4]; + struct CPUWatchpoint *cpu_watchpoint[4]; =20 CPU_COMMON =20 diff --git a/target-lm32/helper.c b/target-lm32/helper.c index e5536c0..67ba278 100644 --- a/target-lm32/helper.c +++ b/target-lm32/helper.c @@ -118,11 +118,12 @@ static bool check_watchpoints(CPULM32State *env) =20 void lm32_debug_excp_handler(CPULM32State *env) { + CPUState *cs =3D CPU(lm32_env_get_cpu(env)); CPUBreakpoint *bp; =20 - if (env->watchpoint_hit) { - if (env->watchpoint_hit->flags & BP_CPU) { - env->watchpoint_hit =3D NULL; + if (cs->watchpoint_hit) { + if (cs->watchpoint_hit->flags & BP_CPU) { + cs->watchpoint_hit =3D NULL; if (check_watchpoints(env)) { raise_exception(env, EXCP_WATCHPOINT); } else { diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index 4bae693..e210bac 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -359,7 +359,7 @@ typedef struct CPUXtensaState { int exception_taken; =20 /* Watchpoints for DBREAK registers */ - CPUWatchpoint *cpu_watchpoint[MAX_NDBREAK]; + struct CPUWatchpoint *cpu_watchpoint[MAX_NDBREAK]; =20 CPU_COMMON } CPUXtensaState; diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c index 2598788..8a9cb0a 100644 --- a/target-xtensa/helper.c +++ b/target-xtensa/helper.c @@ -81,11 +81,13 @@ static uint32_t check_hw_breakpoints(CPUXtensaState *= env) =20 void xtensa_breakpoint_handler(CPUXtensaState *env) { - if (env->watchpoint_hit) { - if (env->watchpoint_hit->flags & BP_CPU) { + CPUState *cs =3D CPU(xtensa_env_get_cpu(env)); + + if (cs->watchpoint_hit) { + if (cs->watchpoint_hit->flags & BP_CPU) { uint32_t cause; =20 - env->watchpoint_hit =3D NULL; + cs->watchpoint_hit =3D NULL; cause =3D check_hw_breakpoints(env); if (cause) { debug_exception_env(env, cause); --=20 1.8.4.5