From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42102) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WMntJ-0001Ab-E4 for qemu-devel@nongnu.org; Sun, 09 Mar 2014 20:16:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WMntD-0005DO-7n for qemu-devel@nongnu.org; Sun, 09 Mar 2014 20:16:25 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Mon, 10 Mar 2014 01:15:29 +0100 Message-Id: <1394410549-13751-21-git-send-email-afaerber@suse.de> In-Reply-To: <1394410549-13751-1-git-send-email-afaerber@suse.de> References: <1394410549-13751-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH qom-cpu v2 20/40] exec: Change tlb_fill() argument to CPUState List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Jia Liu , Anthony Green , Alexander Graf , Blue Swirl , Max Filippov , Michael Walle , "open list:PowerPC" , "Edgar E. Iglesias" , pbonzini@redhat.com, Guan Xuetao , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Aurelien Jarno , Richard Henderson Signed-off-by: Andreas F=C3=A4rber --- include/exec/exec-all.h | 2 +- include/exec/softmmu_template.h | 8 ++++---- target-alpha/mem_helper.c | 8 +++++--- target-arm/op_helper.c | 12 +++++++----- target-cris/op_helper.c | 7 ++++--- target-i386/mem_helper.c | 12 +++++++----- target-lm32/op_helper.c | 13 ++++++++----- target-m68k/op_helper.c | 8 +++++--- target-microblaze/op_helper.c | 13 ++++++++----- target-mips/op_helper.c | 7 ++++--- target-moxie/helper.c | 7 ++++--- target-openrisc/mmu_helper.c | 8 +++++--- target-ppc/mmu_helper.c | 9 +++++---- target-s390x/mem_helper.c | 8 +++++--- target-sh4/op_helper.c | 8 +++++--- target-sparc/ldst_helper.c | 8 +++++--- target-unicore32/op_helper.c | 8 +++++--- target-xtensa/op_helper.c | 6 ++++-- 18 files changed, 91 insertions(+), 61 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 2179329..c8c3a11 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -332,7 +332,7 @@ bool io_mem_read(struct MemoryRegion *mr, hwaddr addr= , bool io_mem_write(struct MemoryRegion *mr, hwaddr addr, uint64_t value, unsigned size); =20 -void tlb_fill(CPUArchState *env1, target_ulong addr, int is_write, int m= mu_idx, +void tlb_fill(CPUState *cpu, target_ulong addr, int is_write, int mmu_id= x, uintptr_t retaddr); =20 uint8_t helper_ldb_cmmu(CPUArchState *env, target_ulong addr, int mmu_id= x); diff --git a/include/exec/softmmu_template.h b/include/exec/softmmu_templ= ate.h index ac825d2..8603933 100644 --- a/include/exec/softmmu_template.h +++ b/include/exec/softmmu_template.h @@ -158,7 +158,7 @@ WORD_TYPE helper_le_ld_name(CPUArchState *env, target= _ulong addr, int mmu_idx, do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, re= taddr); } #endif - tlb_fill(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); + tlb_fill(ENV_GET_CPU(env), addr, READ_ACCESS_TYPE, mmu_idx, reta= ddr); tlb_addr =3D env->tlb_table[mmu_idx][index].ADDR_READ; } =20 @@ -240,7 +240,7 @@ WORD_TYPE helper_be_ld_name(CPUArchState *env, target= _ulong addr, int mmu_idx, do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, re= taddr); } #endif - tlb_fill(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); + tlb_fill(ENV_GET_CPU(env), addr, READ_ACCESS_TYPE, mmu_idx, reta= ddr); tlb_addr =3D env->tlb_table[mmu_idx][index].ADDR_READ; } =20 @@ -360,7 +360,7 @@ void helper_le_st_name(CPUArchState *env, target_ulon= g addr, DATA_TYPE val, do_unaligned_access(env, addr, 1, mmu_idx, retaddr); } #endif - tlb_fill(env, addr, 1, mmu_idx, retaddr); + tlb_fill(ENV_GET_CPU(env), addr, 1, mmu_idx, retaddr); tlb_addr =3D env->tlb_table[mmu_idx][index].addr_write; } =20 @@ -436,7 +436,7 @@ void helper_be_st_name(CPUArchState *env, target_ulon= g addr, DATA_TYPE val, do_unaligned_access(env, addr, 1, mmu_idx, retaddr); } #endif - tlb_fill(env, addr, 1, mmu_idx, retaddr); + tlb_fill(ENV_GET_CPU(env), addr, 1, mmu_idx, retaddr); tlb_addr =3D env->tlb_table[mmu_idx][index].addr_write; } =20 diff --git a/target-alpha/mem_helper.c b/target-alpha/mem_helper.c index 23878ba..3447f82 100644 --- a/target-alpha/mem_helper.c +++ b/target-alpha/mem_helper.c @@ -152,14 +152,16 @@ void alpha_cpu_unassigned_access(CPUState *cs, hwad= dr addr, NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ /* XXX: fix it to restore all registers */ -void tlb_fill(CPUAlphaState *env, target_ulong addr, int is_write, +void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx, uintptr_t retaddr) { - AlphaCPU *cpu =3D alpha_env_get_cpu(env); int ret; =20 - ret =3D alpha_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_idx= ); + ret =3D alpha_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx); if (unlikely(ret !=3D 0)) { + AlphaCPU *cpu =3D ALPHA_CPU(cs); + CPUAlphaState *env =3D &cpu->env; + if (retaddr) { cpu_restore_state(env, retaddr); } diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index 0c0b447..1163e99 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -72,17 +72,19 @@ uint32_t HELPER(neon_tbl)(CPUARMState *env, uint32_t = ireg, uint32_t def, #include "exec/softmmu_template.h" =20 /* try to fill the TLB and return an exception if error. If retaddr is - NULL, it means that the function was called in C code (i.e. not - from generated code or from helper.c) */ -void tlb_fill(CPUARMState *env, target_ulong addr, int is_write, int mmu= _idx, + * NULL, it means that the function was called in C code (i.e. not + * from generated code or from helper.c) + */ +void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx= , uintptr_t retaddr) { - ARMCPU *cpu =3D arm_env_get_cpu(env); - CPUState *cs =3D CPU(cpu); int ret; =20 ret =3D arm_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx); if (unlikely(ret)) { + ARMCPU *cpu =3D ARM_CPU(cs); + CPUARMState *env =3D &cpu->env; + if (retaddr) { /* now we have a real cpu fault */ cpu_restore_state(env, retaddr); diff --git a/target-cris/op_helper.c b/target-cris/op_helper.c index 9b20b94..68a5caa 100644 --- a/target-cris/op_helper.c +++ b/target-cris/op_helper.c @@ -54,15 +54,16 @@ /* Try to fill the TLB and return an exception if error. If retaddr is NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ -void tlb_fill(CPUCRISState *env, target_ulong addr, int is_write, int mm= u_idx, +void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx= , uintptr_t retaddr) { - CRISCPU *cpu =3D cris_env_get_cpu(env); + CRISCPU *cpu =3D CRIS_CPU(cs); + CPUCRISState *env =3D &cpu->env; int ret; =20 D_LOG("%s pc=3D%x tpc=3D%x ra=3D%p\n", __func__, env->pc, env->pregs[PR_EDA], (void *)retaddr); - ret =3D cris_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_idx)= ; + ret =3D cris_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx); if (unlikely(ret)) { if (retaddr) { /* now we have a real cpu fault */ diff --git a/target-i386/mem_helper.c b/target-i386/mem_helper.c index c0d3b45..2f0691b 100644 --- a/target-i386/mem_helper.c +++ b/target-i386/mem_helper.c @@ -129,18 +129,20 @@ void helper_boundl(CPUX86State *env, target_ulong a= 0, int v) =20 #if !defined(CONFIG_USER_ONLY) /* try to fill the TLB and return an exception if error. If retaddr is - NULL, it means that the function was called in C code (i.e. not - from generated code or from helper.c) */ + * NULL, it means that the function was called in C code (i.e. not + * from generated code or from helper.c) + */ /* XXX: fix it to restore all registers */ -void tlb_fill(CPUX86State *env, target_ulong addr, int is_write, int mmu= _idx, +void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx= , uintptr_t retaddr) { - X86CPU *cpu =3D x86_env_get_cpu(env); - CPUState *cs =3D CPU(cpu); int ret; =20 ret =3D x86_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx); if (ret) { + X86CPU *cpu =3D X86_CPU(cs); + CPUX86State *env =3D &cpu->env; + if (retaddr) { /* now we have a real cpu fault */ cpu_restore_state(env, retaddr); diff --git a/target-lm32/op_helper.c b/target-lm32/op_helper.c index 3b513a7..7fc9191 100644 --- a/target-lm32/op_helper.c +++ b/target-lm32/op_helper.c @@ -150,16 +150,19 @@ uint32_t HELPER(rcsr_jrx)(CPULM32State *env) } =20 /* Try to fill the TLB and return an exception if error. If retaddr is - NULL, it means that the function was called in C code (i.e. not - from generated code or from helper.c) */ -void tlb_fill(CPULM32State *env, target_ulong addr, int is_write, int mm= u_idx, + * NULL, it means that the function was called in C code (i.e. not + * from generated code or from helper.c) + */ +void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx= , uintptr_t retaddr) { - LM32CPU *cpu =3D lm32_env_get_cpu(env); int ret; =20 - ret =3D lm32_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_idx)= ; + ret =3D lm32_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx); if (unlikely(ret)) { + LM32CPU *cpu =3D LM32_CPU(cs); + CPULM32State *env =3D &cpu->env; + if (retaddr) { /* now we have a real cpu fault */ cpu_restore_state(env, retaddr); diff --git a/target-m68k/op_helper.c b/target-m68k/op_helper.c index 930d7c8..b1745b8 100644 --- a/target-m68k/op_helper.c +++ b/target-m68k/op_helper.c @@ -53,14 +53,16 @@ extern int semihosting_enabled; /* Try to fill the TLB and return an exception if error. If retaddr is NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ -void tlb_fill(CPUM68KState *env, target_ulong addr, int is_write, int mm= u_idx, +void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx= , uintptr_t retaddr) { - M68kCPU *cpu =3D m68k_env_get_cpu(env); int ret; =20 - ret =3D m68k_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_idx)= ; + ret =3D m68k_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx); if (unlikely(ret)) { + M68kCPU *cpu =3D M68K_CPU(cs); + CPUM68KState *env =3D &cpu->env; + if (retaddr) { /* now we have a real cpu fault */ cpu_restore_state(env, retaddr); diff --git a/target-microblaze/op_helper.c b/target-microblaze/op_helper.= c index 318185a..9e39411 100644 --- a/target-microblaze/op_helper.c +++ b/target-microblaze/op_helper.c @@ -39,16 +39,19 @@ #include "exec/softmmu_template.h" =20 /* Try to fill the TLB and return an exception if error. If retaddr is - NULL, it means that the function was called in C code (i.e. not - from generated code or from helper.c) */ -void tlb_fill(CPUMBState *env, target_ulong addr, int is_write, int mmu_= idx, + * NULL, it means that the function was called in C code (i.e. not + * from generated code or from helper.c) + */ +void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx= , uintptr_t retaddr) { - MicroBlazeCPU *cpu =3D mb_env_get_cpu(env); int ret; =20 - ret =3D mb_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_idx); + ret =3D mb_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx); if (unlikely(ret)) { + MicroBlazeCPU *cpu =3D MICROBLAZE_CPU(cs); + CPUMBState *env =3D &cpu->env; + if (retaddr) { /* now we have a real cpu fault */ cpu_restore_state(env, retaddr); diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index 5a4a656..8c050fc 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -2145,15 +2145,16 @@ static void do_unaligned_access(CPUMIPSState *env= , target_ulong addr, do_raise_exception(env, (is_write =3D=3D 1) ? EXCP_AdES : EXCP_AdEL,= retaddr); } =20 -void tlb_fill(CPUMIPSState *env, target_ulong addr, int is_write, int mm= u_idx, +void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx= , uintptr_t retaddr) { - MIPSCPU *cpu =3D mips_env_get_cpu(env); - CPUState *cs =3D CPU(cpu); int ret; =20 ret =3D mips_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx); if (ret) { + MIPSCPU *cpu =3D MIPS_CPU(cs); + CPUMIPSState *env =3D &cpu->env; + do_raise_exception_err(env, cs->exception_index, env->error_code, retaddr); } diff --git a/target-moxie/helper.c b/target-moxie/helper.c index 3b14f37..06a4c72 100644 --- a/target-moxie/helper.c +++ b/target-moxie/helper.c @@ -46,13 +46,14 @@ /* Try to fill the TLB and return an exception if error. If retaddr is NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ -void tlb_fill(CPUMoxieState *env, target_ulong addr, int is_write, int m= mu_idx, +void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx= , uintptr_t retaddr) { - MoxieCPU *cpu =3D moxie_env_get_cpu(env); + MoxieCPU *cpu =3D MOXIE_CPU(cs); + CPUMoxieState *env =3D &cpu->env; int ret; =20 - ret =3D moxie_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_idx= ); + ret =3D moxie_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx); if (unlikely(ret)) { if (retaddr) { cpu_restore_state(env, retaddr); diff --git a/target-openrisc/mmu_helper.c b/target-openrisc/mmu_helper.c index b023a5f..e3fe6c7 100644 --- a/target-openrisc/mmu_helper.c +++ b/target-openrisc/mmu_helper.c @@ -36,15 +36,17 @@ #define SHIFT 3 #include "exec/softmmu_template.h" =20 -void tlb_fill(CPUOpenRISCState *env, target_ulong addr, int is_write, +void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx, uintptr_t retaddr) { - OpenRISCCPU *cpu =3D openrisc_env_get_cpu(env); int ret; =20 - ret =3D openrisc_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_= idx); + ret =3D openrisc_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx); =20 if (ret) { + OpenRISCCPU *cpu =3D OPENRISC_CPU(cs); + CPUOpenRISCState *env =3D &cpu->env; + if (retaddr) { /* now we have a real cpu fault. */ cpu_restore_state(env, retaddr); diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c index b6abd97..c042184 100644 --- a/target-ppc/mmu_helper.c +++ b/target-ppc/mmu_helper.c @@ -2893,11 +2893,12 @@ void helper_booke206_tlbflush(CPUPPCState *env, u= int32_t type) NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ /* XXX: fix it to restore all registers */ -void tlb_fill(CPUPPCState *env, target_ulong addr, int is_write, int mmu= _idx, +void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx= , uintptr_t retaddr) { - CPUState *cpu =3D CPU(ppc_env_get_cpu(env)); - PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cpu); + PowerPCCPU *cpu =3D POWERPC_CPU(cs); + PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cs); + CPUPPCState *env =3D &cpu->env; int ret; =20 if (pcc->handle_mmu_fault) { @@ -2910,6 +2911,6 @@ void tlb_fill(CPUPPCState *env, target_ulong addr, = int is_write, int mmu_idx, /* now we have a real cpu fault */ cpu_restore_state(env, retaddr); } - helper_raise_exception_err(env, cpu->exception_index, env->error= _code); + helper_raise_exception_err(env, cs->exception_index, env->error_= code); } } diff --git a/target-s390x/mem_helper.c b/target-s390x/mem_helper.c index 411c326..1e74e4d 100644 --- a/target-s390x/mem_helper.c +++ b/target-s390x/mem_helper.c @@ -44,14 +44,16 @@ NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ /* XXX: fix it to restore all registers */ -void tlb_fill(CPUS390XState *env, target_ulong addr, int is_write, int m= mu_idx, +void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx= , uintptr_t retaddr) { - S390CPU *cpu =3D s390_env_get_cpu(env); int ret; =20 - ret =3D s390_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_idx)= ; + ret =3D s390_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx); if (unlikely(ret !=3D 0)) { + S390CPU *cpu =3D S390_CPU(cs); + CPUS390XState *env =3D &cpu->env; + if (likely(retaddr)) { /* now we have a real cpu fault */ cpu_restore_state(env, retaddr); diff --git a/target-sh4/op_helper.c b/target-sh4/op_helper.c index 03633f0..6e527cf 100644 --- a/target-sh4/op_helper.c +++ b/target-sh4/op_helper.c @@ -38,15 +38,17 @@ #define SHIFT 3 #include "exec/softmmu_template.h" =20 -void tlb_fill(CPUSH4State *env, target_ulong addr, int is_write, int mmu= _idx, +void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx= , uintptr_t retaddr) { - SuperHCPU *cpu =3D sh_env_get_cpu(env); int ret; =20 - ret =3D superh_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_id= x); + ret =3D superh_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx); if (ret) { /* now we have a real cpu fault */ + SuperHCPU *cpu =3D SUPERH_CPU(cs); + CPUSH4State *env =3D &cpu->env; + if (retaddr) { cpu_restore_state(env, retaddr); } diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c index 5bbbafd..5efbbe7 100644 --- a/target-sparc/ldst_helper.c +++ b/target-sparc/ldst_helper.c @@ -2434,14 +2434,16 @@ static void QEMU_NORETURN do_unaligned_access(CPU= SPARCState *env, NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ /* XXX: fix it to restore all registers */ -void tlb_fill(CPUSPARCState *env, target_ulong addr, int is_write, int m= mu_idx, +void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx= , uintptr_t retaddr) { - SPARCCPU *cpu =3D sparc_env_get_cpu(env); int ret; =20 - ret =3D sparc_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_idx= ); + ret =3D sparc_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx); if (ret) { + SPARCCPU *cpu =3D SPARC_CPU(cs); + CPUSPARCState *env =3D &cpu->env; + if (retaddr) { cpu_restore_state(env, retaddr); } diff --git a/target-unicore32/op_helper.c b/target-unicore32/op_helper.c index cd2cbef..3efc6a8 100644 --- a/target-unicore32/op_helper.c +++ b/target-unicore32/op_helper.c @@ -257,14 +257,16 @@ uint32_t HELPER(ror_cc)(CPUUniCore32State *env, uin= t32_t x, uint32_t i) #define SHIFT 3 #include "exec/softmmu_template.h" =20 -void tlb_fill(CPUUniCore32State *env, target_ulong addr, int is_write, +void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx, uintptr_t retaddr) { - UniCore32CPU *cpu =3D uc32_env_get_cpu(env); int ret; =20 - ret =3D uc32_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_idx)= ; + ret =3D uc32_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx); if (unlikely(ret)) { + UniCore32CPU *cpu =3D UNICORE32_CPU(cs); + CPUUniCore32State *env =3D &cpu->env; + if (retaddr) { /* now we have a real cpu fault */ cpu_restore_state(env, retaddr); diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c index a314ed0..1c80e31 100644 --- a/target-xtensa/op_helper.c +++ b/target-xtensa/op_helper.c @@ -60,9 +60,11 @@ static void do_unaligned_access(CPUXtensaState *env, } } =20 -void tlb_fill(CPUXtensaState *env, - target_ulong vaddr, int is_write, int mmu_idx, uintptr_t retaddr= ) +void tlb_fill(CPUState *cs, + target_ulong vaddr, int is_write, int mmu_idx, uintptr_t r= etaddr) { + XtensaCPU *cpu =3D XTENSA_CPU(cs); + CPUXtensaState *env =3D &cpu->env; uint32_t paddr; uint32_t page_size; unsigned access; --=20 1.8.4.5