From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49739) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WNKGv-0002sj-RZ for qemu-devel@nongnu.org; Tue, 11 Mar 2014 06:51:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WNKGr-0003qL-Gh for qemu-devel@nongnu.org; Tue, 11 Mar 2014 06:50:57 -0400 Received: from mx1.redhat.com ([209.132.183.28]:20239) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WNKGr-0003qD-97 for qemu-devel@nongnu.org; Tue, 11 Mar 2014 06:50:53 -0400 From: Paolo Bonzini Date: Tue, 11 Mar 2014 11:50:38 +0100 Message-Id: <1394535038-32454-4-git-send-email-pbonzini@redhat.com> In-Reply-To: <1394535038-32454-1-git-send-email-pbonzini@redhat.com> References: <1394535038-32454-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PULL 3/3] target-i386: bugfix of Intel MPX List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: "Liu, Jinsong" , Asit K Mallick , "H. Peter Anvin" From: "Liu, Jinsong" The correct size of cpuid 0x0d sub-leaf 4 is 0x40, not 0x10. This is confirmed by Anvin H Peter and Mallick Asit K. Signed-off-by: Liu Jinsong Cc: H. Peter Anvin Cc: Asit K Mallick Signed-off-by: Paolo Bonzini Signed-off-by: Liu, Jinsong --- target-i386/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 0e8812a..9f69d7e 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -339,7 +339,7 @@ static const ExtSaveArea ext_save_areas[] = { [3] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX, .offset = 0x3c0, .size = 0x40 }, [4] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX, - .offset = 0x400, .size = 0x10 }, + .offset = 0x400, .size = 0x40 }, }; const char *get_register_name_32(unsigned int reg) -- 1.8.3.1