[Qemu-devel] [PATCH] hw/i386: Use unaligned store functions building acpi tables

[Richard Henderson <rth@twiddle.net>]

Hosts that don't support native unaligned stores will SIGBUS
without additional help.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 hw/i386/acpi-build.c | 29 +++++++++++++++--------------
 1 file changed, 15 insertions(+), 14 deletions(-)

diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index b1a7ebb..d636115 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -886,22 +886,24 @@ static void build_pci_bus_end(PCIBus *bus, void *bus_state)
 
 static void patch_pci_windows(PcPciInfo *pci, uint8_t *start, unsigned size)
 {
-    *ACPI_BUILD_PTR(start, size, acpi_pci32_start[0], uint32_t) =
-        cpu_to_le32(pci->w32.begin);
+    /* Note that these pointers are unaligned, so we must use routines
+       that take care for unaligned stores on the host.  */
 
-    *ACPI_BUILD_PTR(start, size, acpi_pci32_end[0], uint32_t) =
-        cpu_to_le32(pci->w32.end - 1);
+    stl_le_p(ACPI_BUILD_PTR(start, size, acpi_pci32_start[0], uint32_t),
+             pci->w32.begin);
+    stl_le_p(ACPI_BUILD_PTR(start, size, acpi_pci32_end[0], uint32_t),
+             pci->w32.end - 1);
 
     if (pci->w64.end || pci->w64.begin) {
-        *ACPI_BUILD_PTR(start, size, acpi_pci64_valid[0], uint8_t) = 1;
-        *ACPI_BUILD_PTR(start, size, acpi_pci64_start[0], uint64_t) =
-            cpu_to_le64(pci->w64.begin);
-        *ACPI_BUILD_PTR(start, size, acpi_pci64_end[0], uint64_t) =
-            cpu_to_le64(pci->w64.end - 1);
-        *ACPI_BUILD_PTR(start, size, acpi_pci64_length[0], uint64_t) =
-            cpu_to_le64(pci->w64.end - pci->w64.begin);
+        stb_p(ACPI_BUILD_PTR(start, size, acpi_pci64_valid[0], uint8_t), 1);
+        stq_le_p(ACPI_BUILD_PTR(start, size, acpi_pci64_start[0], uint64_t),
+                 pci->w64.begin);
+        stq_le_p(ACPI_BUILD_PTR(start, size, acpi_pci64_end[0], uint64_t),
+                 pci->w64.end - 1);
+        stq_le_p(ACPI_BUILD_PTR(start, size, acpi_pci64_length[0], uint64_t),
+                 pci->w64.end - pci->w64.begin);
     } else {
-        *ACPI_BUILD_PTR(start, size, acpi_pci64_valid[0], uint8_t) = 0;
+        stb_p(ACPI_BUILD_PTR(start, size, acpi_pci64_valid[0], uint8_t), 0);
     }
 }
 
@@ -930,8 +932,7 @@ build_ssdt(GArray *table_data, GArray *linker,
 
     patch_pci_windows(pci, ssdt_ptr, sizeof(ssdp_misc_aml));
 
-    *(uint16_t *)(ssdt_ptr + *ssdt_isa_pest) =
-        cpu_to_le16(misc->pvpanic_port);
+    stw_le_p(ssdt_ptr + *ssdt_isa_pest, misc->pvpanic_port);
 
     {
         GArray *sb_scope = build_alloc_array();
-- 
1.8.5.3