[Qemu-devel] [PATCH 8/8] xics: enable interrupt configuration reset on migration

[Alexey Kardashevskiy <aik@ozlabs.ru>]

Interrupt numbers migrate along with other properties so
the initial QEMU setup will be reset by migration. Since
XICS migrates as well and this includes IRQ map with all
the flags saying which ones are already used, all we need
is just to reset the XICS IRQ array on the destination.

This resets XICS IRQ usage map.

This enables devices to migrate IRQ number instead of
checking that the number has not changed since
the initialization.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
---
 hw/intc/xics.c        | 19 +++++++++++++++++++
 hw/ppc/spapr_pci.c    |  2 +-
 hw/ppc/spapr_vio.c    |  2 +-
 include/hw/ppc/xics.h |  1 +
 trace-events          |  1 +
 5 files changed, 23 insertions(+), 2 deletions(-)

diff --git a/hw/intc/xics.c b/hw/intc/xics.c
index 8d101a3..0809a52 100644
--- a/hw/intc/xics.c
+++ b/hw/intc/xics.c
@@ -33,6 +33,8 @@
 #include "qemu/error-report.h"
 #include "qapi/visitor.h"
 
+static void ics_free(ICSState *ics, int irq, int num);
+
 static int get_cpu_index_by_dt_id(int cpu_dt_id)
 {
     PowerPCCPU *cpu = ppc_get_vcpu_by_dt_id(cpu_dt_id);
@@ -531,6 +533,12 @@ static void ics_reset(DeviceState *dev)
     }
 }
 
+static int ics_pre_load(ICSState *ics)
+{
+    ics_free(ics, ics->offset, ics->nr_irqs);
+    return 0;
+}
+
 static int ics_post_load(ICSState *ics, int version_id)
 {
     int i;
@@ -635,6 +643,7 @@ static void ics_class_init(ObjectClass *klass, void *data)
     dc->realize = ics_realize;
     dc->vmsd = &vmstate_ics;
     dc->reset = ics_reset;
+    isc->pre_load = ics_pre_load;
     isc->post_load = ics_post_load;
 }
 
@@ -770,6 +779,16 @@ int xics_alloc_block(XICSState *icp, int server, int num, bool lsi, bool align)
     return first;
 }
 
+static void ics_free(ICSState *ics, int irq, int num)
+{
+    int i;
+
+    trace_xics_ics_free(ics - ics->icp->ics, irq, num);
+    for (i = irq; i < irq + num; ++i) {
+        memset(&ics->irqs[i], 0, sizeof(ICSIRQState));
+    }
+}
+
 /*
  * Guest interfaces
  */
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 4eaf364..aa12d1a 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -661,7 +661,7 @@ static const VMStateDescription vmstate_spapr_pci_lsi = {
     .minimum_version_id = 1,
     .minimum_version_id_old = 1,
     .fields      = (VMStateField []) {
-        VMSTATE_UINT32_EQUAL(irq, struct spapr_pci_lsi),
+        VMSTATE_UINT32(irq, struct spapr_pci_lsi),
 
         VMSTATE_END_OF_LIST()
     },
diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c
index 8aeb263..022c914 100644
--- a/hw/ppc/spapr_vio.c
+++ b/hw/ppc/spapr_vio.c
@@ -548,7 +548,7 @@ const VMStateDescription vmstate_spapr_vio = {
     .fields      = (VMStateField []) {
         /* Sanity check */
         VMSTATE_UINT32_EQUAL(reg, VIOsPAPRDevice),
-        VMSTATE_UINT32_EQUAL(irq, VIOsPAPRDevice),
+        VMSTATE_UINT32(irq, VIOsPAPRDevice),
 
         /* General VIO device state */
         VMSTATE_UINTTL(signal_state, VIOsPAPRDevice),
diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
index 337398d..6ee6279 100644
--- a/include/hw/ppc/xics.h
+++ b/include/hw/ppc/xics.h
@@ -159,6 +159,7 @@ qemu_irq xics_get_qirq(XICSState *icp, int irq);
 void xics_set_irq_type(XICSState *icp, int irq, bool lsi);
 int xics_alloc(XICSState *icp, int server, int irq, bool lsi);
 int xics_alloc_block(XICSState *icp, int server, int num, bool lsi, bool align);
+void xics_free(XICSState *icp, int server, int irq, int num);
 
 void xics_cpu_setup(XICSState *icp, PowerPCCPU *cpu);
 
diff --git a/trace-events b/trace-events
index ad7400e..948ab93 100644
--- a/trace-events
+++ b/trace-events
@@ -1146,6 +1146,7 @@ xics_ics_eoi(int nr) "ics_eoi: irq %#x"
 xics_alloc(int server, int irq) "server#%d, irq %d"
 xics_alloc_failed(int server, int irq) "server#%d, irq %d"
 xics_alloc_block(int server, int first, int num, bool lsi, int align) "server#%d, first irq %d, %d irqs, lsi=%d, alignnum %d"
+xics_ics_free(int server, int irq, int num) "server#%d, first irq %d, %d irqs"
 
 # hw/ppc/spapr_iommu.c
 spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64
-- 
1.8.4.rc4