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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, claudio.fontana@gmail.com
Subject: [Qemu-devel] [PATCH 01/26] tcg-aarch64: Properly detect SIGSEGV writes
Date: Fri, 14 Mar 2014 19:48:27 -0700	[thread overview]
Message-ID: <1394851732-25692-2-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1394851732-25692-1-git-send-email-rth@twiddle.net>

Since the kernel doesn't pass any info on the reason for the fault,
disassemble the instruction to detect a store.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 user-exec.c | 29 +++++++++++++++++++++++------
 1 file changed, 23 insertions(+), 6 deletions(-)

diff --git a/user-exec.c b/user-exec.c
index bc58056..4c0cd46 100644
--- a/user-exec.c
+++ b/user-exec.c
@@ -465,16 +465,33 @@ int cpu_signal_handler(int host_signum, void *pinfo,
 
 #elif defined(__aarch64__)
 
-int cpu_signal_handler(int host_signum, void *pinfo,
-                       void *puc)
+int cpu_signal_handler(int host_signum, void *pinfo, void *puc)
 {
     siginfo_t *info = pinfo;
     struct ucontext *uc = puc;
-    uint64_t pc;
-    int is_write = 0; /* XXX how to determine? */
+    uintptr_t pc = uc->uc_mcontext.pc;
+    uint32_t insn = *(uint32_t *)pc;
+    bool is_write;
 
-    pc = uc->uc_mcontext.pc;
-    return handle_cpu_signal(pc, (uint64_t)info->si_addr,
+    /* XXX: need kernel patch to get write flag faster.  */
+    /* XXX: several of these could be combined.  */
+    is_write = (   (insn & 0xbfff0000) == 0x0c000000   /* C3.3.1 */
+                || (insn & 0xbfe00000) == 0x0c800000   /* C3.3.2 */
+                || (insn & 0xbfff0000) == 0x0d000000   /* C3.3.3 */
+                || (insn & 0xbfe00000) == 0x0d800000   /* C3.3.4 */
+                || (insn & 0x3f400000) == 0x08000000   /* C3.3.6 */
+                || (insn & 0x3bc00000) == 0x28400000   /* C3.3.7 */
+                || (insn & 0x3be00c00) == 0x38000400   /* C3.3.8 */
+                || (insn & 0x3be00c00) == 0x38000c00   /* C3.3.9 */
+                || (insn & 0x3be00c00) == 0x38200800   /* C3.3.10 */
+                || (insn & 0x3be00c00) == 0x38000800   /* C3.3.11 */
+                || (insn & 0x3be00c00) == 0x38000000   /* C3.3.12 */
+                || (insn & 0x3bc00000) == 0x39000000   /* C3.3.13 */
+                || (insn & 0x3bc00000) == 0x29000000   /* C3.3.14 */
+                || (insn & 0x3bc00000) == 0x28800000   /* C3.3.15 */
+                || (insn & 0x3bc00000) == 0x29800000); /* C3.3.16 */
+
+    return handle_cpu_signal(pc, (uintptr_t)info->si_addr,
                              is_write, &uc->uc_sigmask, puc);
 }
 
-- 
1.8.5.3

  reply	other threads:[~2014-03-15  2:49 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-15  2:48 [Qemu-devel] [PATCH 00/26] tcg/aarch64 improvements, part 3 Richard Henderson
2014-03-15  2:48 ` Richard Henderson [this message]
2014-03-24 11:05   ` [Qemu-devel] [PATCH 01/26] tcg-aarch64: Properly detect SIGSEGV writes Claudio Fontana
2014-03-24 15:33     ` Richard Henderson
2014-03-24 11:45   ` Claudio Fontana
2014-03-24 12:17   ` Peter Maydell
2014-03-24 12:41   ` Peter Maydell
2014-03-24 15:27     ` Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 02/26] tcg-aarch64: Use intptr_t apropriately Richard Henderson
2014-03-24 12:12   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 03/26] tcg-aarch64: Use TCGType and TCGMemOp constants Richard Henderson
2014-03-24 12:52   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 04/26] tcg-aarch64: Use MOVN in tcg_out_movi Richard Henderson
2014-03-24 14:06   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 05/26] tcg-aarch64: Use ORRI " Richard Henderson
2014-03-24 14:06   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 06/26] tcg-aarch64: Special case small constants " Richard Henderson
2014-03-24 14:08   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 07/26] tcg-aarch64: Use adrp " Richard Henderson
2014-03-24 14:05   ` Claudio Fontana
2014-03-24 15:36     ` Richard Henderson
2014-03-26  9:34   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 08/26] tcg-aarch64: Use symbolic names for branches Richard Henderson
2014-03-24 15:31   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 09/26] tcg-aarch64: Create tcg_out_brcond Richard Henderson
2014-03-24 15:31   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 10/26] tcg-aarch64: Use CBZ and CBNZ Richard Henderson
2014-03-24 15:32   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 11/26] tcg-aarch64: Reuse FP and LR in translated code Richard Henderson
2014-03-28  9:48   ` Claudio Fontana
2014-03-28 13:23     ` Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 12/26] tcg-aarch64: Introduce tcg_out_insn_3314 Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 13/26] tcg-aarch64: Rearrange prologue insn order Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 14/26] tcg-aarch64: Implement tcg_register_jit Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 15/26] tcg-aarch64: Avoid add with zero in tlb load Richard Henderson
2014-03-26  9:36   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 16/26] tcg-aarch64: Use tcg_out_call for qemu_ld/st Richard Henderson
2014-03-26  9:37   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 17/26] tcg-aarch64: Use ADR to pass the return address to the ld/st helpers Richard Henderson
2014-03-26  9:38   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 18/26] tcg-aarch64: Use TCGMemOp in qemu_ld/st Richard Henderson
2014-03-26  9:39   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 19/26] tcg-aarch64: Implement TCG_TARGET_HAS_new_ldst Richard Henderson
2014-03-26  9:40   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 20/26] tcg-aarch64: Introduce tcg_out_insn_3507 Richard Henderson
2014-03-26  9:40   ` Claudio Fontana
2014-03-15  2:48 ` [Qemu-devel] [PATCH 21/26] tcg-aarch64: Merge aarch64_ldst_get_data/type into tcg_out_op Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 22/26] tcg-aarch64: Replace aarch64_ldst_op_data with TCGMemOp Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 23/26] tcg-aarch64: Replace aarch64_ldst_op_data with AArch64LdstType Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 24/26] tcg-aarch64: Prefer unsigned offsets before signed offsets for ldst Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 25/26] tcg-aarch64: Merge tcg_out_movr with tcg_out_mov Richard Henderson
2014-03-15  2:48 ` [Qemu-devel] [PATCH 26/26] tcg-aarch64: Support stores of zero Richard Henderson

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