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From: Beniamino Galvani <b.galvani@gmail.com>
To: qemu-devel@nongnu.org
Cc: Beniamino Galvani <b.galvani@gmail.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	Peter Crosthwaite <peter.crosthwaite@xilinx.com>,
	Li Guang <lig.fnst@cn.fujitsu.com>
Subject: [Qemu-devel] [PATCH v3 3/7] allwinner-a10-pit: avoid generation of spurious interrupts
Date: Sat, 15 Mar 2014 14:01:29 +0100	[thread overview]
Message-ID: <1394888493-20487-4-git-send-email-b.galvani@gmail.com> (raw)
In-Reply-To: <1394888493-20487-1-git-send-email-b.galvani@gmail.com>

The model was generating interrupts for all enabled timers after the
expiration of one of them. Avoid this by passing explicitly the timer
index to the callback function.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
---
 hw/timer/allwinner-a10-pit.c         |   25 ++++++++++++++-----------
 include/hw/timer/allwinner-a10-pit.h |    8 ++++++++
 2 files changed, 22 insertions(+), 11 deletions(-)

diff --git a/hw/timer/allwinner-a10-pit.c b/hw/timer/allwinner-a10-pit.c
index b27fce8..696b7d9 100644
--- a/hw/timer/allwinner-a10-pit.c
+++ b/hw/timer/allwinner-a10-pit.c
@@ -193,18 +193,17 @@ static void a10_pit_reset(DeviceState *dev)
 
 static void a10_pit_timer_cb(void *opaque)
 {
-    AwA10PITState *s = AW_A10_PIT(opaque);
-    uint8_t i;
+    AwA10TimerContext *tc = opaque;
+    AwA10PITState *s = tc->container;
+    uint8_t i = tc->index;
 
-    for (i = 0; i < AW_A10_PIT_TIMER_NR; i++) {
-        if (s->control[i] & AW_A10_PIT_TIMER_EN) {
-            s->irq_status |= 1 << i;
-            if (s->control[i] & AW_A10_PIT_TIMER_MODE) {
-                ptimer_stop(s->timer[i]);
-                s->control[i] &= ~AW_A10_PIT_TIMER_EN;
-            }
-            qemu_irq_pulse(s->irq[i]);
+    if (s->control[i] & AW_A10_PIT_TIMER_EN) {
+        s->irq_status |= 1 << i;
+        if (s->control[i] & AW_A10_PIT_TIMER_MODE) {
+            ptimer_stop(s->timer[i]);
+            s->control[i] &= ~AW_A10_PIT_TIMER_EN;
         }
+        qemu_irq_pulse(s->irq[i]);
     }
 }
 
@@ -223,7 +222,11 @@ static void a10_pit_init(Object *obj)
     sysbus_init_mmio(sbd, &s->iomem);
 
     for (i = 0; i < AW_A10_PIT_TIMER_NR; i++) {
-        bh[i] = qemu_bh_new(a10_pit_timer_cb, s);
+        AwA10TimerContext *tc = &s->timer_context[i];
+
+        tc->container = s;
+        tc->index = i;
+        bh[i] = qemu_bh_new(a10_pit_timer_cb, tc);
         s->timer[i] = ptimer_init(bh[i]);
         ptimer_set_freq(s->timer[i], 240000);
     }
diff --git a/include/hw/timer/allwinner-a10-pit.h b/include/hw/timer/allwinner-a10-pit.h
index 15efab8..a48d3c7 100644
--- a/include/hw/timer/allwinner-a10-pit.h
+++ b/include/hw/timer/allwinner-a10-pit.h
@@ -35,12 +35,20 @@
 
 #define AW_A10_PIT_DEFAULT_CLOCK   0x4
 
+typedef struct AwA10PITState AwA10PITState;
+
+typedef struct AwA10TimerContext {
+    AwA10PITState *container;
+    int index;
+} AwA10TimerContext;
+
 typedef struct AwA10PITState {
     /*< private >*/
     SysBusDevice parent_obj;
     /*< public >*/
     qemu_irq irq[AW_A10_PIT_TIMER_NR];
     ptimer_state * timer[AW_A10_PIT_TIMER_NR];
+    AwA10TimerContext timer_context[AW_A10_PIT_TIMER_NR];
     MemoryRegion iomem;
 
     uint32_t irq_enable;
-- 
1.7.10.4

  parent reply	other threads:[~2014-03-15 13:02 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-15 13:01 [Qemu-devel] [PATCH v3 0/7] Allwinner A10 fixes Beniamino Galvani
2014-03-15 13:01 ` [Qemu-devel] [PATCH v3 1/7] allwinner-a10-pic: set vector address when an interrupt is pending Beniamino Galvani
2014-03-17  1:16   ` Li Guang
2014-03-15 13:01 ` [Qemu-devel] [PATCH v3 2/7] allwinner-a10-pic: fix behaviour of pending register Beniamino Galvani
2014-03-17  1:00   ` Peter Crosthwaite
2014-03-17  1:17   ` Li Guang
2014-03-15 13:01 ` Beniamino Galvani [this message]
2014-03-17  1:02   ` [Qemu-devel] [PATCH v3 3/7] allwinner-a10-pit: avoid generation of spurious interrupts Peter Crosthwaite
2014-03-17  1:17   ` Li Guang
2014-03-15 13:01 ` [Qemu-devel] [PATCH v3 4/7] allwinner-a10-pit: use level triggered interrupts Beniamino Galvani
2014-03-17  1:10   ` Peter Crosthwaite
2014-03-15 13:01 ` [Qemu-devel] [PATCH v3 5/7] allwinner-a10-pit: implement prescaler and source selection Beniamino Galvani
2014-03-17  1:18   ` Li Guang
2014-03-17  1:27   ` Peter Crosthwaite
2014-03-17 20:45     ` Beniamino Galvani
2014-03-15 13:01 ` [Qemu-devel] [PATCH v3 6/7] allwinner-emac: set autonegotiation complete bit on link up Beniamino Galvani
2014-03-17  1:29   ` Peter Crosthwaite
2014-03-15 13:01 ` [Qemu-devel] [PATCH v3 7/7] allwinner-emac: update irq status after writes to interrupt registers Beniamino Galvani

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