From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39563) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WPMGM-0004zU-JB for qemu-devel@nongnu.org; Sun, 16 Mar 2014 21:22:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WPMGF-0001Vc-AI for qemu-devel@nongnu.org; Sun, 16 Mar 2014 21:22:46 -0400 Received: from [222.73.24.84] (port=45597 helo=song.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WPMGE-0001TW-EG for qemu-devel@nongnu.org; Sun, 16 Mar 2014 21:22:39 -0400 Message-ID: <1395019103.2364.4.camel@localhost> From: Li Guang Date: Mon, 17 Mar 2014 09:18:23 +0800 In-Reply-To: <1394888493-20487-6-git-send-email-b.galvani@gmail.com> References: <1394888493-20487-1-git-send-email-b.galvani@gmail.com> <1394888493-20487-6-git-send-email-b.galvani@gmail.com> Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="UTF-8" Subject: Re: [Qemu-devel] [PATCH v3 5/7] allwinner-a10-pit: implement prescaler and source selection List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Beniamino Galvani Cc: Peter Maydell , Peter Crosthwaite , qemu-devel@nongnu.org =E5=9C=A8 2014-03-15=E5=85=AD=E7=9A=84 14:01 +0100=EF=BC=8CBeniamino Galvan= i=E5=86=99=E9=81=93=EF=BC=9A > This implements the prescaler and source fields of the timer control > register as described in the A10 user manual. >=20 > Signed-off-by: Beniamino Galvani Reviewed-by: Li Guang > --- > hw/timer/allwinner-a10-pit.c | 30 ++++++++++++++++++++++++++++= +- > include/hw/timer/allwinner-a10-pit.h | 8 ++++++++ > 2 files changed, 37 insertions(+), 1 deletion(-) >=20 > diff --git a/hw/timer/allwinner-a10-pit.c b/hw/timer/allwinner-a10-pit.c > index f8c9236..a448689 100644 > --- a/hw/timer/allwinner-a10-pit.c > +++ b/hw/timer/allwinner-a10-pit.c > @@ -74,6 +74,34 @@ static uint64_t a10_pit_read(void *opaque, hwaddr offs= et, unsigned size) > return 0; > } > =20 > +static void a10_pit_set_freq(AwA10PITState *s, int index) > +{ > + uint32_t prescaler, source; > + uint32_t source_freq =3D AW_A10_PIT_OSC24M_FREQ; > + > + prescaler =3D 1 << extract32(s->control[index], 4, 3); > + source =3D extract32(s->control[index], 2, 2); > + > + switch (source) { > + case AW_A10_PIT_SOURCE_LS_OSC: > + source_freq =3D AW_A10_PIT_LS_OSC_FREQ; > + break; > + case AW_A10_PIT_SOURCE_OSC24M: > + source_freq =3D AW_A10_PIT_OSC24M_FREQ; > + break; > + case AW_A10_PIT_SOURCE_PLL6: > + qemu_log_mask(LOG_UNIMP, "%s: unimplemented clock source %u", __= func__, > + source); > + break; > + case AW_A10_PIT_SOURCE_UNDEF: > + qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid clock source %u", __= func__, > + source); > + break; > + } > + > + ptimer_set_freq(s->timer[index], source_freq / prescaler); > +} > + > static void a10_pit_write(void *opaque, hwaddr offset, uint64_t value, > unsigned size) > { > @@ -96,6 +124,7 @@ static void a10_pit_write(void *opaque, hwaddr offset,= uint64_t value, > switch (offset & 0x0f) { > case AW_A10_PIT_TIMER_CONTROL: > s->control[index] =3D value; > + a10_pit_set_freq(s, index); > if (s->control[index] & AW_A10_PIT_TIMER_RELOAD) { > ptimer_set_count(s->timer[index], s->interval[index]); > } > @@ -239,7 +268,6 @@ static void a10_pit_init(Object *obj) > tc->index =3D i; > bh[i] =3D qemu_bh_new(a10_pit_timer_cb, tc); > s->timer[i] =3D ptimer_init(bh[i]); > - ptimer_set_freq(s->timer[i], 240000); > } > } > =20 > diff --git a/include/hw/timer/allwinner-a10-pit.h b/include/hw/timer/allw= inner-a10-pit.h > index a48d3c7..37a2662 100644 > --- a/include/hw/timer/allwinner-a10-pit.h > +++ b/include/hw/timer/allwinner-a10-pit.h > @@ -33,6 +33,14 @@ > #define AW_A10_PIT_TIMER_BASE_END \ > (AW_A10_PIT_TIMER_BASE * 6 + AW_A10_PIT_TIMER_COUNT) > =20 > +#define AW_A10_PIT_SOURCE_LS_OSC 0 > +#define AW_A10_PIT_SOURCE_OSC24M 1 > +#define AW_A10_PIT_SOURCE_PLL6 2 > +#define AW_A10_PIT_SOURCE_UNDEF 3 > + > +#define AW_A10_PIT_LS_OSC_FREQ 32768 > +#define AW_A10_PIT_OSC24M_FREQ 24000000 > + > #define AW_A10_PIT_DEFAULT_CLOCK 0x4 > =20 > typedef struct AwA10PITState AwA10PITState;