From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35216) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WPc9k-0006j9-HM for qemu-devel@nongnu.org; Mon, 17 Mar 2014 14:21:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WPc9d-0004K4-Sr for qemu-devel@nongnu.org; Mon, 17 Mar 2014 14:21:00 -0400 Received: from mail-qc0-x233.google.com ([2607:f8b0:400d:c01::233]:58360) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WPc9d-0004Jw-JQ for qemu-devel@nongnu.org; Mon, 17 Mar 2014 14:20:53 -0400 Received: by mail-qc0-f179.google.com with SMTP id m20so6336802qcx.24 for ; Mon, 17 Mar 2014 11:20:53 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Mon, 17 Mar 2014 11:20:33 -0700 Message-Id: <1395080443-5853-2-git-send-email-rth@twiddle.net> In-Reply-To: <1395080443-5853-1-git-send-email-rth@twiddle.net> References: <1395080443-5853-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL for-2.0 01/11] tcg-sparc: Fix ld64 for 32-bit mode List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: blauwirbel@gmail.com, peter.maydell@linaro.org Since were not using an annulled branch, we need to put a nop in the delay slot. Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index cbd1c91..b459886 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -963,6 +963,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int sizeop) label_ptr[0] = (uint32_t *)s->code_ptr; tcg_out_bpcc0(s, COND_NE, BPCC_PN | (TARGET_LONG_BITS == 64 ? BPCC_XCC : BPCC_ICC), 0); + tcg_out_nop(s); /* TLB Hit. */ /* Load all 64-bits into an O/G register. */ -- 1.8.5.3