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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: blauwirbel@gmail.com, aurelien@aurel32.net
Subject: [Qemu-devel] [PATCH 08/14] tcg-sparc: Tidy check_fit_* tests
Date: Mon, 17 Mar 2014 11:37:50 -0700	[thread overview]
Message-ID: <1395081476-6038-9-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1395081476-6038-1-git-send-email-rth@twiddle.net>

Use sextract instead of raw bit shifting for the tests.  Introduce
a new check_fit_ptr macro to make it clear we're looking at pointers.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/sparc/tcg-target.c | 35 ++++++++++++++++++++---------------
 1 file changed, 20 insertions(+), 15 deletions(-)

diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 43ede5b..3165fe6 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -262,17 +262,23 @@ static const int tcg_target_call_oarg_regs[] = {
 #define STW_LE     (STWA  | INSN_ASI(ASI_PRIMARY_LITTLE))
 #define STX_LE     (STXA  | INSN_ASI(ASI_PRIMARY_LITTLE))
 
-static inline int check_fit_tl(tcg_target_long val, unsigned int bits)
+static inline int check_fit_i64(int64_t val, unsigned int bits)
 {
-    return (val << ((sizeof(tcg_target_long) * 8 - bits))
-            >> (sizeof(tcg_target_long) * 8 - bits)) == val;
+    return val == sextract64(val, 0, bits);
 }
 
-static inline int check_fit_i32(uint32_t val, unsigned int bits)
+static inline int check_fit_i32(int32_t val, unsigned int bits)
 {
-    return ((val << (32 - bits)) >> (32 - bits)) == val;
+    return val == sextract32(val, 0, bits);
 }
 
+#define check_fit_tl    check_fit_i64
+#if SPARC64
+# define check_fit_ptr  check_fit_i64
+#else
+# define check_fit_ptr  check_fit_i32
+#endif
+
 static void patch_reloc(uint8_t *code_ptr, int type,
                         intptr_t value, intptr_t addend)
 {
@@ -287,7 +293,7 @@ static void patch_reloc(uint8_t *code_ptr, int type,
         break;
     case R_SPARC_WDISP16:
         value -= (intptr_t)code_ptr;
-        if (!check_fit_tl(value >> 2, 16)) {
+        if (!check_fit_ptr(value >> 2, 16)) {
             tcg_abort();
         }
         insn = *(uint32_t *)code_ptr;
@@ -297,7 +303,7 @@ static void patch_reloc(uint8_t *code_ptr, int type,
         break;
     case R_SPARC_WDISP19:
         value -= (intptr_t)code_ptr;
-        if (!check_fit_tl(value >> 2, 19)) {
+        if (!check_fit_ptr(value >> 2, 19)) {
             tcg_abort();
         }
         insn = *(uint32_t *)code_ptr;
@@ -420,7 +426,7 @@ static inline void tcg_out_movi_imm13(TCGContext *s, int ret, uint32_t arg)
 static void tcg_out_movi(TCGContext *s, TCGType type,
                          TCGReg ret, tcg_target_long arg)
 {
-    tcg_target_long hi, lo;
+    tcg_target_long hi, lo = (int32_t)arg;
 
     /* A 13-bit constant sign-extended to 64-bits.  */
     if (check_fit_tl(arg, 13)) {
@@ -438,15 +444,14 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
     }
 
     /* A 32-bit constant sign-extended to 64-bits.  */
-    if (check_fit_tl(arg, 32)) {
+    if (arg == lo) {
         tcg_out_sethi(s, ret, ~arg);
         tcg_out_arithi(s, ret, ret, (arg & 0x3ff) | -0x400, ARITH_XOR);
         return;
     }
 
     /* A 64-bit constant decomposed into 2 32-bit pieces.  */
-    lo = (int32_t)arg;
-    if (check_fit_tl(lo, 13)) {
+    if (check_fit_i32(lo, 13)) {
         hi = (arg - lo) >> 32;
         tcg_out_movi(s, TCG_TYPE_I32, ret, hi);
         tcg_out_arithi(s, ret, ret, 32, SHIFT_SLLX);
@@ -469,7 +474,7 @@ static inline void tcg_out_ldst_rr(TCGContext *s, int data, int a1,
 static inline void tcg_out_ldst(TCGContext *s, int ret, int addr,
                                 int offset, int op)
 {
-    if (check_fit_tl(offset, 13)) {
+    if (check_fit_ptr(offset, 13)) {
         tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(addr) |
                   INSN_IMM13(offset));
     } else {
@@ -493,7 +498,7 @@ static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
 static inline void tcg_out_ld_ptr(TCGContext *s, TCGReg ret, uintptr_t arg)
 {
     TCGReg base = TCG_REG_G0;
-    if (!check_fit_tl(arg, 10)) {
+    if (!check_fit_ptr(arg, 10)) {
         tcg_out_movi(s, TCG_TYPE_PTR, ret, arg & ~0x3ff);
         base = ret;
     }
@@ -948,7 +953,7 @@ static TCGReg tcg_out_tlb_load(TCGContext *s, TCGReg addr, int mem_index,
 
     /* Find a base address that can load both tlb comparator and addend.  */
     tlb_ofs = offsetof(CPUArchState, tlb_table[mem_index][0]);
-    if (!check_fit_tl(tlb_ofs + sizeof(CPUTLBEntry), 13)) {
+    if (!check_fit_ptr(tlb_ofs + sizeof(CPUTLBEntry), 13)) {
         tcg_out_addi(s, r1, tlb_ofs & ~0x3ff);
         tlb_ofs &= 0x3ff;
     }
@@ -1138,7 +1143,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
 
     switch (opc) {
     case INDEX_op_exit_tb:
-        if (check_fit_tl(args[0], 13)) {
+        if (check_fit_ptr(args[0], 13)) {
             tcg_out_arithi(s, TCG_REG_G0, TCG_REG_I7, 8, RETURN);
             tcg_out_movi_imm13(s, TCG_REG_O0, args[0]);
         } else {
-- 
1.8.5.3

  parent reply	other threads:[~2014-03-17 18:38 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-17 18:37 [Qemu-devel] [PATCH 00/14] tcg/sparc v8plus code generation Richard Henderson
2014-03-17 18:37 ` [Qemu-devel] [PATCH 01/14] tcg: Fix missed pointer size != TCG_TARGET_REG_BITS changes Richard Henderson
2014-03-17 18:37 ` [Qemu-devel] [PATCH 02/14] tcg: Add INDEX_op_trunc_i32 Richard Henderson
2014-03-21 23:35   ` Stuart Brady
2014-03-21 23:39     ` Stuart Brady
2014-03-17 18:37 ` [Qemu-devel] [PATCH 03/14] tcg-sparc: Remove most uses of TCG_TARGET_REG_BITS Richard Henderson
2014-03-17 18:37 ` [Qemu-devel] [PATCH 04/14] tcg-sparc: Support trunc_i32 Richard Henderson
2014-03-17 18:37 ` [Qemu-devel] [PATCH 05/14] tcg-sparc: Use 64-bit registers with sparcv8plus Richard Henderson
2014-03-17 18:37 ` [Qemu-devel] [PATCH 06/14] tcg-sparc: Use the RETURN instruction Richard Henderson
2014-03-17 18:37 ` [Qemu-devel] [PATCH 07/14] tcg-sparc: Implement muls2_i32 Richard Henderson
2014-03-17 18:37 ` Richard Henderson [this message]
2014-03-17 18:37 ` [Qemu-devel] [PATCH 09/14] tcg-sparc: Don't handle mov/movi in tcg_out_op Richard Henderson
2014-03-17 18:37 ` [Qemu-devel] [PATCH 10/14] tcg-sparc: Hoist common argument loads " Richard Henderson
2014-03-17 18:37 ` [Qemu-devel] [PATCH 11/14] tcg-sparc: Fixup function argument types Richard Henderson
2014-03-17 18:37 ` [Qemu-devel] [PATCH 12/14] tcg-sparc: Fix small 32-bit movi Richard Henderson
2014-03-17 18:37 ` [Qemu-devel] [PATCH 13/14] tcg-sparc: Fix 32-bit constant arguments tests Richard Henderson
2014-03-22  9:48   ` Stuart Brady
2014-03-22 17:08     ` Richard Henderson
2014-03-17 18:37 ` [Qemu-devel] [PATCH 14/14] tcg-sparc: Accept stores of zero Richard Henderson

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