From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34029) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WQ7B0-0000mH-3h for qemu-devel@nongnu.org; Tue, 18 Mar 2014 23:28:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WQ7Ar-0005ws-SD for qemu-devel@nongnu.org; Tue, 18 Mar 2014 23:28:22 -0400 Received: from e23smtp07.au.ibm.com ([202.81.31.140]:41421) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WQ7Ar-0005wP-2Q for qemu-devel@nongnu.org; Tue, 18 Mar 2014 23:28:13 -0400 Received: from /spool/local by e23smtp07.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 19 Mar 2014 13:28:09 +1000 From: Alexey Kardashevskiy Date: Wed, 19 Mar 2014 14:28:02 +1100 Message-Id: <1395199682-28772-1-git-send-email-aik@ozlabs.ru> Subject: [Qemu-devel] [PATCH] target-ppc: reset SPRs on CPU reset List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Alexey Kardashevskiy , qemu-ppc@nongnu.org, Alexander Graf , =?UTF-8?q?Andreas=20F=C3=A4rber?= This resets SPR values to defaults on CPU reset. This should help with little-endian guests reboot issues. Signed-off-by: Alexey Kardashevskiy --- target-ppc/cpu.h | 1 + target-ppc/translate_init.c | 12 +++++++++++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 91b7ae5..8c181e7 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -334,6 +334,7 @@ struct ppc_spr_t { void (*hea_write)(void *opaque, int spr_num, int gpr_num); #endif const char *name; + target_ulong default_value; #ifdef CONFIG_KVM /* We (ab)use the fact that all the SPRs will have ids for the * ONE_REG interface will have KVM_REG_PPC to use 0 as meaning, diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 6084f40..c63f4a1 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -631,7 +631,7 @@ static inline void _spr_register(CPUPPCState *env, int num, #if defined(CONFIG_KVM) spr->one_reg_id = one_reg_id, #endif - env->spr[num] = initial_value; + env->spr[num] = spr->default_value = initial_value; } /* Generic PowerPC SPRs */ @@ -8381,6 +8381,7 @@ static void ppc_cpu_reset(CPUState *s) PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); CPUPPCState *env = &cpu->env; target_ulong msr; + int i; pcc->parent_reset(s); @@ -8434,6 +8435,15 @@ static void ppc_cpu_reset(CPUState *s) env->dtl_size = 0; #endif /* TARGET_PPC64 */ + for (i = 0; i < sizeof(env->spr_cb)/sizeof(env->spr_cb[0]); i++) { + ppc_spr_t *spr = &env->spr_cb[i]; + + if (!spr->name) { + continue; + } + env->spr[i] = spr->default_value; + } + /* Flush all TLBs */ tlb_flush(s, 1); } -- 1.8.4.rc4