From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45054) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WQQSe-0001rZ-3o for qemu-devel@nongnu.org; Wed, 19 Mar 2014 20:04:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WQQSV-0005g4-Rw for qemu-devel@nongnu.org; Wed, 19 Mar 2014 20:03:52 -0400 Received: from e23smtp04.au.ibm.com ([202.81.31.146]:48497) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WQQSV-0005fi-1G for qemu-devel@nongnu.org; Wed, 19 Mar 2014 20:03:43 -0400 Received: from /spool/local by e23smtp04.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 20 Mar 2014 10:03:37 +1000 From: Alexey Kardashevskiy Date: Thu, 20 Mar 2014 11:03:29 +1100 Message-Id: <1395273809-12809-4-git-send-email-aik@ozlabs.ru> In-Reply-To: <1395273809-12809-1-git-send-email-aik@ozlabs.ru> References: <1395273809-12809-1-git-send-email-aik@ozlabs.ru> Subject: [Qemu-devel] [PATCH v5 3/3] spapr_hcall: add address-translation-mode-on-interrupt resource in H_SET_MODE List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Alexey Kardashevskiy , qemu-ppc@nongnu.org, Alexander Graf , =?UTF-8?q?Andreas=20F=C3=A4rber?= This adds handling of the RESOURCE_ADDR_TRANS_MODE resource from the H_SET_MODE, for POWER8 (PowerISA 2.07) only. Signed-off-by: Alexey Kardashevskiy --- hw/ppc/spapr_hcall.c | 26 ++++++++++++++++++++++++++ target-ppc/cpu.h | 2 ++ 2 files changed, 28 insertions(+) diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index fc5211b..fb23730 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -747,6 +747,32 @@ static target_ulong h_set_mode(PowerPCCPU *cpu, sPAPREnvironment *spapr, default: ret = H_UNSUPPORTED_FLAG; } + } else if (resource == H_SET_MODE_RESOURCE_ADDR_TRANS_MODE) { + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); + + if (!(pcc->insns_flags2 & PPC2_ISA207S)) { + return H_P2; + } + if (value1) { + ret = H_P3; + goto out; + } + if (value2) { + ret = H_P4; + goto out; + } + switch (mflags) { + case 0: + case 2: + case 3: + CPU_FOREACH(cs) { + set_spr(cs, SPR_LPCR, mflags << LPCR_AIL_SH, LPCR_AIL); + } + return H_SUCCESS; + + default: + return H_UNSUPPORTED_FLAG; + } } out: diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 72cb546..577193a 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -462,6 +462,8 @@ struct ppc_slb_t { #define MSR_LE 0 /* Little-endian mode 1 hflags */ #define LPCR_ILE (1 << (63-38)) +#define LPCR_AIL 0x01800000 /* Alternate interrupt location */ +#define LPCR_AIL_SH (63-40) #define msr_sf ((env->msr >> MSR_SF) & 1) #define msr_isf ((env->msr >> MSR_ISF) & 1) -- 1.8.4.rc4