From: Tom Musta <tommusta@gmail.com>
To: qemu-devel@nongnu.org
Cc: Tom Musta <tommusta@gmail.com>, qemu-ppc@nongnu.org
Subject: [Qemu-devel] [PATCH 2/9] target-ppc: Bug: VSX Convert to Integer Should Truncate
Date: Wed, 26 Mar 2014 15:45:47 -0500 [thread overview]
Message-ID: <1395866754-18673-3-git-send-email-tommusta@gmail.com> (raw)
In-Reply-To: <1395866754-18673-1-git-send-email-tommusta@gmail.com>
The various VSX Convert to Integer instructions should truncate the
floating point number to an integer value, which is equivalent to
a round-to-zero rounding mode. The existing VSX floating point to
integer conversion helpers are erroneously using the rounding mode set
int the PowerPC Floating Point Status and Control Register (FPSCR).
This change corrects this defect by using the appropriate
float*_to_*_round_to_zero() routines fro the softfloat library.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Tested-by: Tom Musta <tommusta@gmail.com>
V2: Restored rounding mode prior to checking exceptions per Peter Maydell's
review.
V3: Changed to use float*_to_*_round_to_zero() routines from softfloat instead
of directly tweaking and restoring the rounding mode (per Peter's review).
This bug was discovered when running wget, which does this:
double maxtime;
struct timeval tmout;
...
tmout.tv_usec = 1000000 * (maxtime - (long) maxtime);
The newest PowerPC 64-bit gcc's are now using xscvdpsxds to perform the cast of
the double to long. A timeout of 0.95 was erroneously rounding up to 1 and
hence computing a negative timeout value.
It would be great if we could still get this into 2.0.
---
target-ppc/fpu_helper.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index fd91239..691d572 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -2568,7 +2568,8 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXCVI, 0); \
xt.tfld = rnan; \
} else { \
- xt.tfld = stp##_to_##ttp(xb.sfld, &env->fp_status); \
+ xt.tfld = stp##_to_##ttp##_round_to_zero(xb.sfld, \
+ &env->fp_status); \
if (env->fp_status.float_exception_flags & float_flag_invalid) { \
fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXCVI, 0); \
} \
--
1.7.1
next prev parent reply other threads:[~2014-03-26 20:46 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-26 20:45 [Qemu-devel] [PATCH 0/9] target-ppc: VSX Bug Fixes Tom Musta
2014-03-26 20:45 ` [Qemu-devel] [PATCH 1/9] softfloat: Introduce float32_to_uint64_round_to_zero Tom Musta
2014-03-31 17:26 ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
2014-03-31 17:48 ` [Qemu-devel] " Peter Maydell
2014-03-31 18:07 ` Tom Musta
2014-03-31 18:12 ` Peter Maydell
2014-03-26 20:45 ` Tom Musta [this message]
2014-03-26 20:45 ` [Qemu-devel] [PATCH 3/9] target-ppc: Define Endian-Correct Accessors for VSR Field Acess Tom Musta
2014-03-26 20:45 ` [Qemu-devel] [PATCH 4/9] target-ppc: Correct LE Host Inversion of Lower VSRs Tom Musta
2014-03-26 20:45 ` [Qemu-devel] [PATCH 5/9] target-ppc: Correct Simple VSR LE Host Inversions Tom Musta
2014-03-26 20:45 ` [Qemu-devel] [PATCH 6/9] target-ppc: Correct VSX Scalar Compares Tom Musta
2014-03-26 20:45 ` [Qemu-devel] [PATCH 7/9] target-ppc: Correct VSX FP to FP Conversions Tom Musta
2014-03-26 20:45 ` [Qemu-devel] [PATCH 8/9] target-ppc: Correct VSX FP to Integer Conversion Tom Musta
2014-03-26 20:45 ` [Qemu-devel] [PATCH 9/9] target-ppc: Correct VSX Integer to FP Conversion Tom Musta
2014-03-28 3:49 ` [Qemu-devel] [PATCH 0/9] target-ppc: VSX Bug Fixes Anton Blanchard
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