[Qemu-devel] [PULL for-2.0 0/5] PowerPC patch queue 2014-03-27

[Qemu-devel] [PULL for-2.0 0/5] PowerPC patch queue 2014-03-27

[Andreas Färber]

Hello Peter,

Please pull the PowerPC queue into qemu.git master.

Regards,
Andreas

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-ppc@nongnu.org
Cc: Alexander Graf <agraf@suse.de>
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>

The following changes since commit bea4acda3bff00e98cb00d5354f23de9e74a928f:

  Merge remote-tracking branch 'remotes/mcayland/qemu-sparc' into staging (2014-03-27 10:54:17 +0000)

are available in the git repository at:


  git://github.com/afaerber/qemu-cpu.git tags/ppc-for-2.0

for you to fetch changes up to 76ac9940c3114db35df92582f3549d9a64a369c4:

  target-ppc: MSR_POW not supported on POWER7/7+/8 (2014-03-27 16:15:34 +0100)

----------------------------------------------------------------
PowerPC queue for 2.0

* OpenPIC fix
* MSR fixes for POWER7 upwards
* TCG instruction set support fix for POWER8

----------------------------------------------------------------
Anton Blanchard (4):
      target-ppc: POWER8 supports the MSR_LE bit
      target-ppc: POWER8 supports isel
      target-ppc: POWER7+ supports the MSR_VSX bit
      target-ppc: MSR_POW not supported on POWER7/7+/8

Prasad Joshi (1):
      intc/openpic_kvm: Fix MemListener delete region callback function

 hw/intc/openpic_kvm.c       | 2 +-
 target-ppc/translate_init.c | 8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)

[Qemu-devel] [PULL for-2.0 1/5] intc/openpic_kvm: Fix MemListener delete region callback function

[Andreas Färber]

From: Prasad Joshi <prasadjoshi.linux@gmail.com>

Fixes d85937e683f6ff4d68293cb24c780fb1f6820d2c.

Signed-off-by: Prasad Joshi <prasadjoshi.linux@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/intc/openpic_kvm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/intc/openpic_kvm.c b/hw/intc/openpic_kvm.c
index 87fdb12..afa604d 100644
--- a/hw/intc/openpic_kvm.c
+++ b/hw/intc/openpic_kvm.c
@@ -200,7 +200,7 @@ static void kvm_openpic_realize(DeviceState *dev, Error **errp)
     qdev_init_gpio_in(dev, kvm_openpic_set_irq, OPENPIC_MAX_IRQ);
 
     opp->mem_listener.region_add = kvm_openpic_region_add;
-    opp->mem_listener.region_add = kvm_openpic_region_del;
+    opp->mem_listener.region_del = kvm_openpic_region_del;
     memory_listener_register(&opp->mem_listener, &address_space_memory);
 
     /* indicate pic capabilities */
-- 
1.8.4.5

[Qemu-devel] [PULL for-2.0 2/5] target-ppc: POWER8 supports the MSR_LE bit

[Andreas Färber]

From: Anton Blanchard <anton@samba.org>

Add MSR_LE to the msr_mask for POWER8.

Signed-off-by: Anton Blanchard <anton@samba.org>
Reviewed-by: Cédric Le Goater <clg@fr.ibm.com>
Tested-by: Cédric Le Goater <clg@fr.ibm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-ppc/translate_init.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 7f53c33..a82c8f9 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7175,7 +7175,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
                         PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 |
                         PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
                         PPC2_ISA205 | PPC2_ISA207S;
-    pcc->msr_mask = 0x800000000284FF36ULL;
+    pcc->msr_mask = 0x800000000284FF37ULL;
     pcc->mmu_model = POWERPC_MMU_2_06;
 #if defined(CONFIG_SOFTMMU)
     pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault;
-- 
1.8.4.5

[Qemu-devel] [PULL for-2.0 3/5] target-ppc: POWER8 supports isel

[Andreas Färber]

From: Anton Blanchard <anton@samba.org>

Add PPC_ISEL to insns_flags.

Signed-off-by: Anton Blanchard <anton@samba.org>
Reviewed-by: Cédric Le Goater <clg@fr.ibm.com>
Tested-by: Cédric Le Goater <clg@fr.ibm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-ppc/translate_init.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index a82c8f9..4fda0fd 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7157,7 +7157,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
     pcc->pvr_mask = CPU_POWERPC_POWER8_MASK;
     pcc->init_proc = init_proc_POWER8;
     pcc->check_pow = check_pow_nocheck;
-    pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB |
+    pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB |
                        PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
                        PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE |
                        PPC_FLOAT_FRSQRTES |
-- 
1.8.4.5

[Qemu-devel] [PULL for-2.0 4/5] target-ppc: POWER7+ supports the MSR_VSX bit

[Andreas Färber]

From: Anton Blanchard <anton@samba.org>

Without MSR_VSX we die early during a Linux boot.

Signed-off-by: Anton Blanchard <anton@samba.org>
Reviewed-by: Cédric Le Goater <clg@fr.ibm.com>
Tested-by: Cédric Le Goater <clg@fr.ibm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-ppc/translate_init.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 4fda0fd..87c00a1 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7118,7 +7118,7 @@ POWERPC_FAMILY(POWER7P)(ObjectClass *oc, void *data)
                         PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 |
                         PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 |
                         PPC2_FP_TST_ISA206;
-    pcc->msr_mask = 0x800000000204FF37ULL;
+    pcc->msr_mask = 0x800000000284FF37ULL;
     pcc->mmu_model = POWERPC_MMU_2_06;
 #if defined(CONFIG_SOFTMMU)
     pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault;
-- 
1.8.4.5

[Qemu-devel] [PULL for-2.0 5/5] target-ppc: MSR_POW not supported on POWER7/7+/8

[Andreas Färber]

From: Anton Blanchard <anton@samba.org>

Remove MSR_POW from the msr_mask for POWER7/7P/8.

Signed-off-by: Anton Blanchard <anton@samba.org>
Reviewed-by: Cédric Le Goater <clg@fr.ibm.com>
Tested-by: Cédric Le Goater <clg@fr.ibm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-ppc/translate_init.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 87c00a1..d07e186 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7075,7 +7075,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
                         PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 |
                         PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 |
                         PPC2_FP_TST_ISA206;
-    pcc->msr_mask = 0x800000000284FF37ULL;
+    pcc->msr_mask = 0x800000000280FF37ULL;
     pcc->mmu_model = POWERPC_MMU_2_06;
 #if defined(CONFIG_SOFTMMU)
     pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault;
@@ -7118,7 +7118,7 @@ POWERPC_FAMILY(POWER7P)(ObjectClass *oc, void *data)
                         PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 |
                         PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 |
                         PPC2_FP_TST_ISA206;
-    pcc->msr_mask = 0x800000000284FF37ULL;
+    pcc->msr_mask = 0x800000000280FF37ULL;
     pcc->mmu_model = POWERPC_MMU_2_06;
 #if defined(CONFIG_SOFTMMU)
     pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault;
@@ -7175,7 +7175,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
                         PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 |
                         PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
                         PPC2_ISA205 | PPC2_ISA207S;
-    pcc->msr_mask = 0x800000000284FF37ULL;
+    pcc->msr_mask = 0x800000000280FF37ULL;
     pcc->mmu_model = POWERPC_MMU_2_06;
 #if defined(CONFIG_SOFTMMU)
     pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault;
-- 
1.8.4.5

Re: [Qemu-devel] [PULL for-2.0 0/5] PowerPC patch queue 2014-03-27

[Peter Maydell]

On 27 March 2014 16:19, Andreas Färber <afaerber@suse.de> wrote:
> Hello Peter,
>
> Please pull the PowerPC queue into qemu.git master.
>
> Regards,
> Andreas
>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: qemu-ppc@nongnu.org
> Cc: Alexander Graf <agraf@suse.de>
> Cc: Alexey Kardashevskiy <aik@ozlabs.ru>
>
> The following changes since commit bea4acda3bff00e98cb00d5354f23de9e74a928f:
>
>   Merge remote-tracking branch 'remotes/mcayland/qemu-sparc' into staging (2014-03-27 10:54:17 +0000)
>
> are available in the git repository at:
>
>
>   git://github.com/afaerber/qemu-cpu.git tags/ppc-for-2.0
>
> for you to fetch changes up to 76ac9940c3114db35df92582f3549d9a64a369c4:
>
>   target-ppc: MSR_POW not supported on POWER7/7+/8 (2014-03-27 16:15:34 +0100)
>
Applied, thanks.

-- PMM