From: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, Anup Patel <anup.patel@linaro.org>,
patches@apm.com, kvmarm@list.cs.columbia.edu,
christoffer.dall@linaro.org,
Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
Subject: [Qemu-devel] [RFC PATCH V2 5/6] target-arm: Provide PSCI v0.2 constants to generic QEMU code
Date: Tue, 1 Apr 2014 17:23:51 +0530 [thread overview]
Message-ID: <1396353232-3835-6-git-send-email-pranavkumar@linaro.org> (raw)
In-Reply-To: <1396353232-3835-1-git-send-email-pranavkumar@linaro.org>
Provide QEMU PSCI v0.2 constants for non-KVM code; this will
allow us to avoid an #ifdef in boards which set up a PSCI v0.2
node in the device tree.
Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
Signed-off-by: Anup Patel <anup.patel@linaro.org>
---
target-arm/kvm-consts.h | 63 ++++++++++++++++++++++++++++++++++++++---------
1 file changed, 52 insertions(+), 11 deletions(-)
diff --git a/target-arm/kvm-consts.h b/target-arm/kvm-consts.h
index 6009a33..5cf93ab 100644
--- a/target-arm/kvm-consts.h
+++ b/target-arm/kvm-consts.h
@@ -38,17 +38,58 @@ MISMATCH_CHECK(CP_REG_SIZE_U64, KVM_REG_SIZE_U64)
MISMATCH_CHECK(CP_REG_ARM, KVM_REG_ARM)
MISMATCH_CHECK(CP_REG_ARCH_MASK, KVM_REG_ARCH_MASK)
-#define PSCI_FN_BASE 0x95c1ba5e
-#define PSCI_FN(n) (PSCI_FN_BASE + (n))
-#define PSCI_FN_CPU_SUSPEND PSCI_FN(0)
-#define PSCI_FN_CPU_OFF PSCI_FN(1)
-#define PSCI_FN_CPU_ON PSCI_FN(2)
-#define PSCI_FN_MIGRATE PSCI_FN(3)
-
-MISMATCH_CHECK(PSCI_FN_CPU_SUSPEND, KVM_PSCI_FN_CPU_SUSPEND)
-MISMATCH_CHECK(PSCI_FN_CPU_OFF, KVM_PSCI_FN_CPU_OFF)
-MISMATCH_CHECK(PSCI_FN_CPU_ON, KVM_PSCI_FN_CPU_ON)
-MISMATCH_CHECK(PSCI_FN_MIGRATE, KVM_PSCI_FN_MIGRATE)
+/* PSCI v0.1 interface */
+#define QEMU_PSCI_FN_BASE 0x95c1ba5e
+#define QEMU_PSCI_FN(n) (QEMU_PSCI_FN_BASE + (n))
+#define QEMU_PSCI_FN_CPU_SUSPEND QEMU_PSCI_FN(0)
+#define QEMU_PSCI_FN_CPU_OFF QEMU_PSCI_FN(1)
+#define QEMU_PSCI_FN_CPU_ON QEMU_PSCI_FN(2)
+#define QEMU_PSCI_FN_MIGRATE QEMU_PSCI_FN(3)
+
+MISMATCH_CHECK(QEMU_PSCI_FN_CPU_SUSPEND, KVM_PSCI_FN_CPU_SUSPEND)
+MISMATCH_CHECK(QEMU_PSCI_FN_CPU_OFF, KVM_PSCI_FN_CPU_OFF)
+MISMATCH_CHECK(QEMU_PSCI_FN_CPU_ON, KVM_PSCI_FN_CPU_ON)
+MISMATCH_CHECK(QEMU_PSCI_FN_MIGRATE, KVM_PSCI_FN_MIGRATE)
+
+/* PSCI v0.2 interface */
+#define QEMU_PSCI_0_2_FN_BASE 0x84000000
+#define QEMU_PSCI_0_2_FN(n) (QEMU_PSCI_0_2_FN_BASE + (n))
+#define QEMU_PSCI_0_2_FN64_BASE 0xC4000000
+#define QEMU_PSCI_0_2_FN64(n) (QEMU_PSCI_0_2_FN64_BASE + (n))
+#define QEMU_PSCI_0_2_FN_PSCI_VERSION QEMU_PSCI_0_2_FN(0)
+#define QEMU_PSCI_0_2_FN_CPU_SUSPEND QEMU_PSCI_0_2_FN(1)
+#define QEMU_PSCI_0_2_FN_CPU_OFF QEMU_PSCI_0_2_FN(2)
+#define QEMU_PSCI_0_2_FN_CPU_ON QEMU_PSCI_0_2_FN(3)
+#define QEMU_PSCI_0_2_FN_AFFINITY_INFO QEMU_PSCI_0_2_FN(4)
+#define QEMU_PSCI_0_2_FN_MIGRATE QEMU_PSCI_0_2_FN(5)
+#define QEMU_PSCI_0_2_FN_MIGRATE_INFO_TYPE QEMU_PSCI_0_2_FN(6)
+#define QEMU_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU QEMU_PSCI_0_2_FN(7)
+#define QEMU_PSCI_0_2_FN_SYSTEM_OFF QEMU_PSCI_0_2_FN(8)
+#define QEMU_PSCI_0_2_FN_SYSTEM_RESET QEMU_PSCI_0_2_FN(9)
+#define QEMU_PSCI_0_2_FN64_CPU_SUSPEND QEMU_PSCI_0_2_FN64(1)
+#define QEMU_PSCI_0_2_FN64_CPU_ON QEMU_PSCI_0_2_FN64(3)
+#define QEMU_PSCI_0_2_FN64_AFFINITY_INFO QEMU_PSCI_0_2_FN64(4)
+#define QEMU_PSCI_0_2_FN64_MIGRATE QEMU_PSCI_0_2_FN64(5)
+#define QEMU_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU QEMU_PSCI_0_2_FN64(7)
+
+MISMATCH_CHECK(QEMU_PSCI_0_2_FN_PSCI_VERSION, PSCI_0_2_FN_PSCI_VERSION)
+MISMATCH_CHECK(QEMU_PSCI_0_2_FN_CPU_SUSPEND, PSCI_0_2_FN_CPU_SUSPEND)
+MISMATCH_CHECK(QEMU_PSCI_0_2_FN_CPU_OFF, PSCI_0_2_FN_CPU_OFF)
+MISMATCH_CHECK(QEMU_PSCI_0_2_FN_CPU_ON, PSCI_0_2_FN_CPU_ON)
+MISMATCH_CHECK(QEMU_PSCI_0_2_FN_AFFINITY_INFO, PSCI_0_2_FN_AFFINITY_INFO)
+MISMATCH_CHECK(QEMU_PSCI_0_2_FN_MIGRATE, PSCI_0_2_FN_MIGRATE)
+MISMATCH_CHECK(QEMU_PSCI_0_2_FN_MIGRATE_INFO_TYPE, \
+ PSCI_0_2_FN_MIGRATE_INFO_TYPE)
+MISMATCH_CHECK(QEMU_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU, \
+ PSCI_0_2_FN_MIGRATE_INFO_UP_CPU)
+MISMATCH_CHECK(QEMU_PSCI_0_2_FN_SYSTEM_OFF, PSCI_0_2_FN_SYSTEM_OFF)
+MISMATCH_CHECK(QEMU_PSCI_0_2_FN_SYSTEM_RESET, PSCI_0_2_FN_SYSTEM_RESET)
+MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_CPU_SUSPEND, PSCI_0_2_FN64_CPU_SUSPEND)
+MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_CPU_ON, PSCI_0_2_FN64_CPU_ON)
+MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_AFFINITY_INFO, PSCI_0_2_FN64_AFFINITY_INFO)
+MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_MIGRATE, PSCI_0_2_FN64_MIGRATE)
+MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU, \
+ PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU)
/* Note that KVM uses overlapping values for AArch32 and AArch64
* target CPU numbers. AArch32 targets:
--
1.7.9.5
next prev parent reply other threads:[~2014-04-01 11:54 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-01 11:53 [Qemu-devel] [RFC PATCH V2 0/6] PSCI v0.2 support for KVM ARM/ARM64 Pranavkumar Sawargaonkar
2014-04-01 11:53 ` [Qemu-devel] [RFC PATCH V2 1/6] linux-headers: Update KVM headers from v3.14 Pranavkumar Sawargaonkar
2014-04-01 11:53 ` [Qemu-devel] [RFC PATCH V2 2/6] kvm: Handle exit reason KVM_EXIT_SYSTEM_EVENT Pranavkumar Sawargaonkar
2014-04-01 11:53 ` [Qemu-devel] [RFC PATCH V2 3/6] target-arm: Enable KVM_ARM_VCPU_PSCI_0_2 feature when possible Pranavkumar Sawargaonkar
2014-04-01 12:16 ` Peter Maydell
2014-04-02 4:51 ` Pranavkumar Sawargaonkar
2014-04-01 11:53 ` [Qemu-devel] [RFC PATCH V2 4/6] target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64 Pranavkumar Sawargaonkar
2014-04-01 12:13 ` Peter Maydell
2014-04-02 4:52 ` Pranavkumar Sawargaonkar
2014-04-01 11:53 ` Pranavkumar Sawargaonkar [this message]
2014-04-01 11:53 ` [Qemu-devel] [RFC PATCH V2 6/6] hw/arm/virt: Use PSCI v0.2 function IDs when kernel supports its Pranavkumar Sawargaonkar
2014-04-01 12:00 ` Pranavkumar Sawargaonkar
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