From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55406) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WV6YM-0004Pe-65 for qemu-devel@nongnu.org; Tue, 01 Apr 2014 17:49:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WV6YG-0001ub-HP for qemu-devel@nongnu.org; Tue, 01 Apr 2014 17:49:06 -0400 From: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Date: Tue, 1 Apr 2014 23:48:00 +0200 Message-Id: <1396388881-7889-1-git-send-email-hpoussin@reactos.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH] prep: add support for OpenBIOS List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= , =?UTF-8?q?Andreas=20F=C3=A4rber?= , qemu-ppc@nongnu.org Note that OHW is still the default firmware. Signed-off-by: Herv=C3=A9 Poussineau --- hw/ppc/prep.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index dfe4a5c..e59d5b9 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -52,6 +52,8 @@ =20 #define MAX_IDE_BUS 2 =20 +#define CFG_ADDR 0xf0000510 + #define BIOS_SIZE (1024 * 1024) #define BIOS_FILENAME "ppc_rom.bin" #define KERNEL_LOAD_ADDR 0x01000000 @@ -358,6 +360,12 @@ static const MemoryRegionPortio prep_portio_list[] =3D= { PORTIO_END_OF_LIST(), }; =20 +static int fw_cfg_boot_set(void *opaque, const char *boot_device) +{ + fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); + return 0; +} + /* PowerPC PREP hardware initialisation */ static void ppc_prep_init(QEMUMachineInitArgs *args) { @@ -389,6 +397,7 @@ static void ppc_prep_init(QEMUMachineInitArgs *args) qemu_irq *cpu_exit_irq; int ppc_boot_device; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; + void *fw_cfg; =20 sysctrl =3D g_malloc0(sizeof(sysctrl_t)); =20 @@ -559,6 +568,39 @@ static void ppc_prep_init(QEMUMachineInitArgs *args) /* XXX: need an option to load a NVRAM image */ 0, graphic_width, graphic_height, graphic_depth); + + /* Prepare firmware configuration for OpenBIOS */ + fw_cfg =3D fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2); + fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus); + fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1); + fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)args->ram_size); + fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_PREP); + fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, 0); + fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, 0); + fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0); + fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, 0); + fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, 0); + fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, boot_device[0]); + + fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width); + fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height); + fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth); + + fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled()); + if (kvm_enabled()) { +#ifdef CONFIG_KVM + uint8_t *hypercall; + + fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq()); + hypercall =3D g_malloc(16); + kvmppc_get_hypercall(env, hypercall, 16); + fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16); + fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid()); +#endif + } else { + fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec()); + } + qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); } =20 static QEMUMachine prep_machine =3D { --=20 1.7.10.4