From: Alexander Graf <agraf@suse.de>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Alexey Kardashevskiy <aik@ozlabs.ru>,
qemu-ppc@nongnu.org, Frederic Konrad <fred.konrad@greensocs.com>,
afaerber@suse.de, Greg Kurz <gkurz@linux.vnet.ibm.com>
Subject: [Qemu-devel] [PATCH 2.0] PPC: E500: Set PIR default reset value rather than SPR value
Date: Thu, 3 Apr 2014 20:48:19 +0200 [thread overview]
Message-ID: <1396550899-26024-1-git-send-email-agraf@suse.de> (raw)
We now reset SPRs to their reset values on CPU reset. So if we want
to have an SPR persistently changed, we need to change its default
reset value rather than the value itself manually.
Do this for SPR_BOOKE_PIR, fixing e500v2 SMP boot.
Reported-by: Frederic Konrad <fred.konrad@greensocs.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
---
hw/ppc/e500.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index d7ba25f..f984b3e 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -649,7 +649,7 @@ void ppce500_init(QEMUMachineInitArgs *args, PPCE500Params *params)
input = (qemu_irq *)env->irq_inputs;
irqs[i][OPENPIC_OUTPUT_INT] = input[PPCE500_INPUT_INT];
irqs[i][OPENPIC_OUTPUT_CINT] = input[PPCE500_INPUT_CINT];
- env->spr[SPR_BOOKE_PIR] = cs->cpu_index = i;
+ env->spr_cb[SPR_BOOKE_PIR].default_value = cs->cpu_index = i;
env->mpic_iack = MPC8544_CCSRBAR_BASE +
MPC8544_MPIC_REGS_OFFSET + 0xa0;
--
1.8.1.4
next reply other threads:[~2014-04-03 18:48 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-03 18:48 Alexander Graf [this message]
2014-04-03 18:50 ` [Qemu-devel] [PATCH 2.0] PPC: E500: Set PIR default reset value rather than SPR value Andreas Färber
2014-04-03 18:55 ` Peter Maydell
2014-04-03 18:58 ` Alexander Graf
2014-04-04 0:26 ` Alexey Kardashevskiy
2014-04-04 6:50 ` Alexander Graf
2014-04-04 8:18 ` Frederic Konrad
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