From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: claudio.fontana@gmail.com
Subject: [Qemu-devel] [PATCH v3 13/26] tcg-aarch64: Implement tcg_register_jit
Date: Thu, 3 Apr 2014 12:56:27 -0700 [thread overview]
Message-ID: <1396555000-8205-14-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1396555000-8205-1-git-send-email-rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/aarch64/tcg-target.c | 84 +++++++++++++++++++++++++++++++++++++++---------
1 file changed, 69 insertions(+), 15 deletions(-)
diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c
index 5cffe50..4414bd1 100644
--- a/tcg/aarch64/tcg-target.c
+++ b/tcg/aarch64/tcg-target.c
@@ -1848,24 +1848,29 @@ static void tcg_target_init(TCGContext *s)
tcg_add_target_add_op_defs(aarch64_op_defs);
}
+/* Saving pairs: (X19, X20) .. (X27, X28), (X29(fp), X30(lr)). */
+#define PUSH_SIZE ((30 - 19 + 1) * 8)
+
+#define FRAME_SIZE \
+ ((PUSH_SIZE \
+ + TCG_STATIC_CALL_ARGS_SIZE \
+ + CPU_TEMP_BUF_NLONGS * sizeof(long) \
+ + TCG_TARGET_STACK_ALIGN - 1) \
+ & ~(TCG_TARGET_STACK_ALIGN - 1))
+
+/* We're expecting a 2 byte uleb128 encoded value. */
+QEMU_BUILD_BUG_ON(FRAME_SIZE >= (1 << 14));
+
+/* We're expecting to use a single ADDI insn. */
+QEMU_BUILD_BUG_ON(FRAME_SIZE - PUSH_SIZE > 0xfff);
+
static void tcg_target_qemu_prologue(TCGContext *s)
{
- /* NB: frame sizes are in 16 byte stack units! */
- int frame_size_callee_saved, frame_size_tcg_locals;
TCGReg r;
- /* save pairs (FP, LR) and (X19, X20) .. (X27, X28) */
- frame_size_callee_saved = 16 + (TCG_REG_X28 - TCG_REG_X19 + 1) * 8;
-
- /* frame size requirement for TCG local variables */
- frame_size_tcg_locals = TCG_STATIC_CALL_ARGS_SIZE
- + CPU_TEMP_BUF_NLONGS * sizeof(long)
- + (TCG_TARGET_STACK_ALIGN - 1);
- frame_size_tcg_locals &= ~(TCG_TARGET_STACK_ALIGN - 1);
-
/* Push (FP, LR) and allocate space for all saved registers. */
tcg_out_insn(s, 3314, STP, TCG_REG_FP, TCG_REG_LR,
- TCG_REG_SP, -frame_size_callee_saved, 1, 1);
+ TCG_REG_SP, -PUSH_SIZE, 1, 1);
/* Set up frame pointer for canonical unwinding. */
tcg_out_movr_sp(s, TCG_TYPE_I64, TCG_REG_FP, TCG_REG_SP);
@@ -1878,7 +1883,7 @@ static void tcg_target_qemu_prologue(TCGContext *s)
/* Make stack space for TCG locals. */
tcg_out_insn(s, 3401, SUBI, TCG_TYPE_I64, TCG_REG_SP, TCG_REG_SP,
- frame_size_tcg_locals);
+ FRAME_SIZE - PUSH_SIZE);
/* Inform TCG about how to find TCG locals with register, offset, size. */
tcg_set_frame(s, TCG_REG_SP, TCG_STATIC_CALL_ARGS_SIZE,
@@ -1898,7 +1903,7 @@ static void tcg_target_qemu_prologue(TCGContext *s)
/* Remove TCG locals stack space. */
tcg_out_insn(s, 3401, ADDI, TCG_TYPE_I64, TCG_REG_SP, TCG_REG_SP,
- frame_size_tcg_locals);
+ FRAME_SIZE - PUSH_SIZE);
/* Restore registers x19..x28. */
for (r = TCG_REG_X19; r <= TCG_REG_X27; r += 2) {
@@ -1908,6 +1913,55 @@ static void tcg_target_qemu_prologue(TCGContext *s)
/* Pop (FP, LR), restore SP to previous frame. */
tcg_out_insn(s, 3314, LDP, TCG_REG_FP, TCG_REG_LR,
- TCG_REG_SP, frame_size_callee_saved, 0, 1);
+ TCG_REG_SP, PUSH_SIZE, 0, 1);
tcg_out_insn(s, 3207, RET, TCG_REG_LR);
}
+
+typedef struct {
+ DebugFrameCIE cie;
+ DebugFrameFDEHeader fde;
+ uint8_t fde_def_cfa[4];
+ uint8_t fde_reg_ofs[24];
+} DebugFrame;
+
+#define ELF_HOST_MACHINE EM_AARCH64
+
+static DebugFrame debug_frame = {
+ .cie.len = sizeof(DebugFrameCIE)-4, /* length after .len member */
+ .cie.id = -1,
+ .cie.version = 1,
+ .cie.code_align = 1,
+ .cie.data_align = 0x78, /* sleb128 -8 */
+ .cie.return_column = TCG_REG_LR,
+
+ /* Total FDE size does not include the "len" member. */
+ .fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, fde.cie_offset),
+
+ .fde_def_cfa = {
+ 12, TCG_REG_SP, /* DW_CFA_def_cfa sp, ... */
+ (FRAME_SIZE & 0x7f) | 0x80, /* ... uleb128 FRAME_SIZE */
+ (FRAME_SIZE >> 7)
+ },
+ .fde_reg_ofs = {
+ 0x80 + 28, 1, /* DW_CFA_offset, x28, -8 */
+ 0x80 + 27, 2, /* DW_CFA_offset, x27, -16 */
+ 0x80 + 26, 3, /* DW_CFA_offset, x26, -24 */
+ 0x80 + 25, 4, /* DW_CFA_offset, x25, -32 */
+ 0x80 + 24, 5, /* DW_CFA_offset, x24, -40 */
+ 0x80 + 23, 6, /* DW_CFA_offset, x23, -48 */
+ 0x80 + 22, 7, /* DW_CFA_offset, x22, -56 */
+ 0x80 + 21, 8, /* DW_CFA_offset, x21, -64 */
+ 0x80 + 20, 9, /* DW_CFA_offset, x20, -72 */
+ 0x80 + 19, 10, /* DW_CFA_offset, x1p, -80 */
+ 0x80 + 30, 11, /* DW_CFA_offset, lr, -88 */
+ 0x80 + 29, 12, /* DW_CFA_offset, fp, -96 */
+ }
+};
+
+void tcg_register_jit(void *buf, size_t buf_size)
+{
+ debug_frame.fde.func_start = (intptr_t)buf;
+ debug_frame.fde.func_len = buf_size;
+
+ tcg_register_jit_int(buf, buf_size, &debug_frame, sizeof(debug_frame));
+}
--
1.9.0
next prev parent reply other threads:[~2014-04-03 19:57 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-03 19:56 [Qemu-devel] [PATCH v2 00/26] tcg-aarch64 improvements, part 3 Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 01/26] tcg-aarch64: Properly detect SIGSEGV writes Richard Henderson
2014-04-07 7:58 ` Claudio Fontana
2014-04-07 16:33 ` Richard Henderson
2014-04-07 16:39 ` Peter Maydell
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 02/26] tcg-aarch64: Use intptr_t apropriately Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 03/26] tcg-aarch64: Use TCGType and TCGMemOp constants Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 04/26] tcg-aarch64: Use MOVN in tcg_out_movi Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 05/26] tcg-aarch64: Use ORRI " Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 06/26] tcg-aarch64: Special case small constants " Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 07/26] tcg-aarch64: Use adrp " Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 08/26] tcg-aarch64: Use symbolic names for branches Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 09/26] tcg-aarch64: Create tcg_out_brcond Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 10/26] tcg-aarch64: Use CBZ and CBNZ Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 11/26] tcg-aarch64: Reuse LR in translated code Richard Henderson
2014-04-07 8:03 ` Claudio Fontana
2014-04-07 9:49 ` Peter Maydell
2014-04-07 11:11 ` Claudio Fontana
2014-04-07 11:28 ` Peter Maydell
2014-04-11 12:33 ` Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 12/26] tcg-aarch64: Introduce tcg_out_insn_3314 Richard Henderson
2014-04-11 12:34 ` Claudio Fontana
2014-04-03 19:56 ` Richard Henderson [this message]
2014-04-11 12:34 ` [Qemu-devel] [PATCH v3 13/26] tcg-aarch64: Implement tcg_register_jit Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 14/26] tcg-aarch64: Avoid add with zero in tlb load Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 15/26] tcg-aarch64: Use tcg_out_call for qemu_ld/st Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 16/26] tcg-aarch64: Use ADR to pass the return address to the ld/st helpers Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 17/26] tcg-aarch64: Use TCGMemOp in qemu_ld/st Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 18/26] tcg-aarch64: Pass qemu_ld/st arguments directly Richard Henderson
2014-04-11 12:34 ` Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 19/26] tcg-aarch64: Implement TCG_TARGET_HAS_new_ldst Richard Henderson
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 20/26] tcg-aarch64: Support stores of zero Richard Henderson
2014-04-11 12:34 ` Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 21/26] tcg-aarch64: Introduce tcg_out_insn_3507 Richard Henderson
2014-04-09 12:54 ` Claudio Fontana
2014-04-09 17:17 ` Richard Henderson
2014-04-11 12:36 ` Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 22/26] tcg-aarch64: Merge aarch64_ldst_get_data/type into tcg_out_op Richard Henderson
2014-04-11 12:34 ` Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 23/26] tcg-aarch64: Replace aarch64_ldst_op_data with TCGMemOp Richard Henderson
2014-04-11 12:35 ` Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 24/26] tcg-aarch64: Replace aarch64_ldst_op_data with AArch64LdstType Richard Henderson
2014-04-07 11:45 ` Claudio Fontana
2014-04-07 14:31 ` Richard Henderson
2014-04-11 12:35 ` Claudio Fontana
2014-04-07 18:34 ` [Qemu-devel] [PATCH 27/26] tcg-aarch64: Introduce tcg_out_insn_3312, _3310, _3313 Richard Henderson
2014-04-08 9:00 ` Claudio Fontana
2014-04-11 12:36 ` Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 25/26] tcg-aarch64: Prefer unsigned offsets before signed offsets for ldst Richard Henderson
2014-04-11 12:35 ` Claudio Fontana
2014-04-03 19:56 ` [Qemu-devel] [PATCH v3 26/26] tcg-aarch64: Use tcg_out_mov in preference to tcg_out_movr Richard Henderson
2014-04-11 12:36 ` Claudio Fontana
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