From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46829) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WVnlR-0007NJ-BT for qemu-devel@nongnu.org; Thu, 03 Apr 2014 15:57:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WVnlM-0004nm-Jp for qemu-devel@nongnu.org; Thu, 03 Apr 2014 15:57:29 -0400 Received: from mail-qc0-x22f.google.com ([2607:f8b0:400d:c01::22f]:58292) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WVnlM-0004nL-8r for qemu-devel@nongnu.org; Thu, 03 Apr 2014 15:57:24 -0400 Received: by mail-qc0-f175.google.com with SMTP id e16so2428148qcx.20 for ; Thu, 03 Apr 2014 12:57:23 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Thu, 3 Apr 2014 12:56:35 -0700 Message-Id: <1396555000-8205-22-git-send-email-rth@twiddle.net> In-Reply-To: <1396555000-8205-1-git-send-email-rth@twiddle.net> References: <1396555000-8205-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v3 21/26] tcg-aarch64: Introduce tcg_out_insn_3507 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: claudio.fontana@gmail.com Cleaning up the implementation of REV and REV16 at the same time. Reviewed-by: Claudio Fontana Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c index caaf8a2..de7490d 100644 --- a/tcg/aarch64/tcg-target.c +++ b/tcg/aarch64/tcg-target.c @@ -327,6 +327,10 @@ typedef enum { I3506_CSEL = 0x1a800000, I3506_CSINC = 0x1a800400, + /* Data-processing (1 source) instructions. */ + I3507_REV16 = 0x5ac00400, + I3507_REV = 0x5ac00800, + /* Data-processing (2 source) instructions. */ I3508_LSLV = 0x1ac02000, I3508_LSRV = 0x1ac02400, @@ -545,6 +549,12 @@ static void tcg_out_insn_3506(TCGContext *s, AArch64Insn insn, TCGType ext, | tcg_cond_to_aarch64[c] << 12); } +static void tcg_out_insn_3507(TCGContext *s, AArch64Insn insn, TCGType ext, + TCGReg rd, TCGReg rn) +{ + tcg_out32(s, insn | ext << 31 | rn << 5 | rd); +} + static void tcg_out_insn_3509(TCGContext *s, AArch64Insn insn, TCGType ext, TCGReg rd, TCGReg rn, TCGReg rm, TCGReg ra) { @@ -961,19 +971,15 @@ static void tcg_out_brcond(TCGContext *s, TCGMemOp ext, TCGCond c, TCGArg a, } static inline void tcg_out_rev(TCGContext *s, TCGType ext, - TCGReg rd, TCGReg rm) + TCGReg rd, TCGReg rn) { - /* using REV 0x5ac00800 */ - unsigned int base = ext ? 0xdac00c00 : 0x5ac00800; - tcg_out32(s, base | rm << 5 | rd); + tcg_out_insn(s, 3507, REV, ext, rd, rn); } static inline void tcg_out_rev16(TCGContext *s, TCGType ext, - TCGReg rd, TCGReg rm) + TCGReg rd, TCGReg rn) { - /* using REV16 0x5ac00400 */ - unsigned int base = ext ? 0xdac00400 : 0x5ac00400; - tcg_out32(s, base | rm << 5 | rd); + tcg_out_insn(s, 3507, REV16, ext, rd, rn); } static inline void tcg_out_sxt(TCGContext *s, TCGType ext, TCGMemOp s_bits, -- 1.9.0