* [Qemu-devel] [PATCH v8] target-ppc: gdbstub allow byte swapping for reading/writing registers
@ 2014-04-04 20:23 Thomas Falcon
2014-04-05 14:51 ` Andreas Färber
0 siblings, 1 reply; 3+ messages in thread
From: Thomas Falcon @ 2014-04-04 20:23 UTC (permalink / raw)
To: qemu-devel; +Cc: Thomas Falcon, qemu-ppc, agraf
This patch allows registers to be properly read from and written to
when using the gdbstub to debug a ppc guest running in little
endian mode. It accomplishes this goal by byte swapping the values of
any registers if the MSR:LE value is set.
Signed-off-by: Thomas Falcon <tlfalcon@linux.vnet.ibm.com>
---
Differences for v7:
Inlined the register_read() and register_write() wrapper functions
---
target-ppc/cpu-qom.h | 1 +
target-ppc/gdbstub.c | 125 +++++++++++++++++++++++++++++++++++++--------------
2 files changed, 92 insertions(+), 34 deletions(-)
diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
index 47dc8e6..aab4977 100644
--- a/target-ppc/cpu-qom.h
+++ b/target-ppc/cpu-qom.h
@@ -111,6 +111,7 @@ void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
int flags);
void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f,
fprintf_function cpu_fprintf, int flags);
+void ppc_cpu_gdb_swap_register(uint8_t *buf, int reg, int len);
hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
diff --git a/target-ppc/gdbstub.c b/target-ppc/gdbstub.c
index 1c91090..594dd08 100644
--- a/target-ppc/gdbstub.c
+++ b/target-ppc/gdbstub.c
@@ -21,6 +21,58 @@
#include "qemu-common.h"
#include "exec/gdbstub.h"
+static int ppc_cpu_gdb_register_len(int n)
+{
+ switch (n) {
+ case 0 ... 31:
+ /* gprs */
+ return sizeof(target_ulong);
+ case 32 ... 63:
+ /* fprs */
+ if (gdb_has_xml) {
+ return 0;
+ }
+ return 8;
+ case 66:
+ /* cr */
+ return 4;
+ case 64:
+ /* nip */
+ case 65:
+ /* msr */
+ case 67:
+ /* lr */
+ case 68:
+ /* ctr */
+ case 69:
+ /* xer */
+ return sizeof(target_ulong);
+ case 70:
+ /* fpscr */
+ if (gdb_has_xml) {
+ return 0;
+ }
+ return sizeof(target_ulong);
+ default:
+ return 0;
+ }
+}
+
+
+/* The following functions are used to ensure the correct
+ * transfer of registers between a little endian ppc target
+ * and a big endian host by checking the LE bit in the Machine State Register
+ */
+
+void ppc_cpu_gdb_swap_register(uint8_t *mem_buf, int n, int len)
+{
+ if (len == 4) {
+ bswap32s((uint32_t *)mem_buf);
+ } else {
+ bswap64s((uint64_t *)mem_buf);
+ }
+}
+
/* Old gdb always expects FP registers. Newer (xml-aware) gdb only
* expects whatever the target description contains. Due to a
* historical mishap the FP registers appear in between core integer
@@ -32,23 +84,26 @@ int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
{
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = &cpu->env;
+ int r = ppc_cpu_gdb_register_len(n);
+
+ if (!r) {
+ return r;
+ }
if (n < 32) {
/* gprs */
- return gdb_get_regl(mem_buf, env->gpr[n]);
+ gdb_get_regl(mem_buf, env->gpr[n]);
} else if (n < 64) {
/* fprs */
- if (gdb_has_xml) {
- return 0;
- }
stfq_p(mem_buf, env->fpr[n-32]);
- return 8;
} else {
switch (n) {
case 64:
- return gdb_get_regl(mem_buf, env->nip);
+ gdb_get_regl(mem_buf, env->nip);
+ break;
case 65:
- return gdb_get_regl(mem_buf, env->msr);
+ gdb_get_regl(mem_buf, env->msr);
+ break;
case 66:
{
uint32_t cr = 0;
@@ -56,50 +111,55 @@ int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
for (i = 0; i < 8; i++) {
cr |= env->crf[i] << (32 - ((i + 1) * 4));
}
- return gdb_get_reg32(mem_buf, cr);
+ gdb_get_reg32(mem_buf, cr);
+ break;
}
case 67:
- return gdb_get_regl(mem_buf, env->lr);
+ gdb_get_regl(mem_buf, env->lr);
+ break;
case 68:
- return gdb_get_regl(mem_buf, env->ctr);
+ gdb_get_regl(mem_buf, env->ctr);
+ break;
case 69:
- return gdb_get_regl(mem_buf, env->xer);
+ gdb_get_regl(mem_buf, env->xer);
+ break;
case 70:
- {
- if (gdb_has_xml) {
- return 0;
- }
- return gdb_get_reg32(mem_buf, env->fpscr);
- }
+ gdb_get_reg32(mem_buf, env->fpscr);
+ break;
}
}
- return 0;
+ if (msr_le) {
+ ppc_cpu_gdb_swap_register(mem_buf, n, r);
+ }
+ return r;
}
int ppc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = &cpu->env;
+ int r = ppc_cpu_gdb_register_len(n);
+ if (!r) {
+ return r;
+ }
+ if (msr_le) {
+ ppc_cpu_gdb_swap_register(mem_buf, n, r);
+ }
if (n < 32) {
/* gprs */
env->gpr[n] = ldtul_p(mem_buf);
- return sizeof(target_ulong);
} else if (n < 64) {
/* fprs */
- if (gdb_has_xml) {
- return 0;
- }
env->fpr[n-32] = ldfq_p(mem_buf);
- return 8;
} else {
switch (n) {
case 64:
env->nip = ldtul_p(mem_buf);
- return sizeof(target_ulong);
+ break;
case 65:
ppc_store_msr(env, ldtul_p(mem_buf));
- return sizeof(target_ulong);
+ break;
case 66:
{
uint32_t cr = ldl_p(mem_buf);
@@ -107,25 +167,22 @@ int ppc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
for (i = 0; i < 8; i++) {
env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
}
- return 4;
+ break;
}
case 67:
env->lr = ldtul_p(mem_buf);
- return sizeof(target_ulong);
+ break;
case 68:
env->ctr = ldtul_p(mem_buf);
- return sizeof(target_ulong);
+ break;
case 69:
env->xer = ldtul_p(mem_buf);
- return sizeof(target_ulong);
+ break;
case 70:
/* fpscr */
- if (gdb_has_xml) {
- return 0;
- }
store_fpscr(env, ldtul_p(mem_buf), 0xffffffff);
- return sizeof(target_ulong);
+ break;
}
}
- return 0;
+ return r;
}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] [PATCH v8] target-ppc: gdbstub allow byte swapping for reading/writing registers
2014-04-04 20:23 [Qemu-devel] [PATCH v8] target-ppc: gdbstub allow byte swapping for reading/writing registers Thomas Falcon
@ 2014-04-05 14:51 ` Andreas Färber
2014-04-05 14:55 ` Alexander Graf
0 siblings, 1 reply; 3+ messages in thread
From: Andreas Färber @ 2014-04-05 14:51 UTC (permalink / raw)
To: Thomas Falcon, qemu-devel; +Cc: qemu-ppc, agraf
Am 04.04.2014 22:23, schrieb Thomas Falcon:
> This patch allows registers to be properly read from and written to
> when using the gdbstub to debug a ppc guest running in little
> endian mode. It accomplishes this goal by byte swapping the values of
> any registers if the MSR:LE value is set.
>
> Signed-off-by: Thomas Falcon <tlfalcon@linux.vnet.ibm.com>
> ---
> Differences for v7:
>
> Inlined the register_read() and register_write() wrapper functions
> ---
> target-ppc/cpu-qom.h | 1 +
> target-ppc/gdbstub.c | 125 +++++++++++++++++++++++++++++++++++++--------------
> 2 files changed, 92 insertions(+), 34 deletions(-)
>
> diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
> index 47dc8e6..aab4977 100644
> --- a/target-ppc/cpu-qom.h
> +++ b/target-ppc/cpu-qom.h
> @@ -111,6 +111,7 @@ void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
> int flags);
> void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f,
> fprintf_function cpu_fprintf, int flags);
> +void ppc_cpu_gdb_swap_register(uint8_t *buf, int reg, int len);
This is only ever used in gdbstub.c. Can we please keep it static there
to avoid a full ppc*-softmmu rebuild?
> hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
> int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
> int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
> diff --git a/target-ppc/gdbstub.c b/target-ppc/gdbstub.c
> index 1c91090..594dd08 100644
> --- a/target-ppc/gdbstub.c
> +++ b/target-ppc/gdbstub.c
> @@ -21,6 +21,58 @@
> #include "qemu-common.h"
> #include "exec/gdbstub.h"
>
> +static int ppc_cpu_gdb_register_len(int n)
Nitpick: Since these two functions do not operate on the CPU, you could
just use ppc_gdb_* rather than ppc_cpu_gdb_*.
> +{
> + switch (n) {
> + case 0 ... 31:
> + /* gprs */
> + return sizeof(target_ulong);
> + case 32 ... 63:
> + /* fprs */
> + if (gdb_has_xml) {
> + return 0;
> + }
> + return 8;
> + case 66:
> + /* cr */
> + return 4;
> + case 64:
> + /* nip */
> + case 65:
> + /* msr */
> + case 67:
> + /* lr */
> + case 68:
> + /* ctr */
> + case 69:
> + /* xer */
> + return sizeof(target_ulong);
> + case 70:
> + /* fpscr */
> + if (gdb_has_xml) {
> + return 0;
> + }
> + return sizeof(target_ulong);
> + default:
> + return 0;
> + }
> +}
> +
> +
> +/* The following functions are used to ensure the correct
> + * transfer of registers between a little endian ppc target
> + * and a big endian host by checking the LE bit in the Machine State Register
> + */
> +
> +void ppc_cpu_gdb_swap_register(uint8_t *mem_buf, int n, int len)
> +{
> + if (len == 4) {
> + bswap32s((uint32_t *)mem_buf);
> + } else {
> + bswap64s((uint64_t *)mem_buf);
> + }
This logic assumes that len can only be either 4 or 8. Please use an
explicit len == 8 comparison and g_assert_not_reached() on unhandled len
values.
> +}
> +
> /* Old gdb always expects FP registers. Newer (xml-aware) gdb only
> * expects whatever the target description contains. Due to a
> * historical mishap the FP registers appear in between core integer
> @@ -32,23 +84,26 @@ int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
> {
> PowerPCCPU *cpu = POWERPC_CPU(cs);
> CPUPPCState *env = &cpu->env;
> + int r = ppc_cpu_gdb_register_len(n);
> +
> + if (!r) {
> + return r;
> + }
>
> if (n < 32) {
> /* gprs */
> - return gdb_get_regl(mem_buf, env->gpr[n]);
> + gdb_get_regl(mem_buf, env->gpr[n]);
> } else if (n < 64) {
> /* fprs */
> - if (gdb_has_xml) {
> - return 0;
> - }
I stumbled over dropping this not being related to Little Endian or
being mentioned in the commit message. Maybe mention that this is
replaced by ..._register_len() and returning early?
Otherwise looking much more to my taste now. :)
Regards,
Andreas
> stfq_p(mem_buf, env->fpr[n-32]);
> - return 8;
> } else {
> switch (n) {
> case 64:
> - return gdb_get_regl(mem_buf, env->nip);
> + gdb_get_regl(mem_buf, env->nip);
> + break;
> case 65:
> - return gdb_get_regl(mem_buf, env->msr);
> + gdb_get_regl(mem_buf, env->msr);
> + break;
> case 66:
> {
> uint32_t cr = 0;
> @@ -56,50 +111,55 @@ int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
> for (i = 0; i < 8; i++) {
> cr |= env->crf[i] << (32 - ((i + 1) * 4));
> }
> - return gdb_get_reg32(mem_buf, cr);
> + gdb_get_reg32(mem_buf, cr);
> + break;
> }
> case 67:
> - return gdb_get_regl(mem_buf, env->lr);
> + gdb_get_regl(mem_buf, env->lr);
> + break;
> case 68:
> - return gdb_get_regl(mem_buf, env->ctr);
> + gdb_get_regl(mem_buf, env->ctr);
> + break;
> case 69:
> - return gdb_get_regl(mem_buf, env->xer);
> + gdb_get_regl(mem_buf, env->xer);
> + break;
> case 70:
> - {
> - if (gdb_has_xml) {
> - return 0;
> - }
> - return gdb_get_reg32(mem_buf, env->fpscr);
> - }
> + gdb_get_reg32(mem_buf, env->fpscr);
> + break;
> }
> }
> - return 0;
> + if (msr_le) {
> + ppc_cpu_gdb_swap_register(mem_buf, n, r);
> + }
> + return r;
> }
>
> int ppc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
> {
> PowerPCCPU *cpu = POWERPC_CPU(cs);
> CPUPPCState *env = &cpu->env;
> + int r = ppc_cpu_gdb_register_len(n);
>
> + if (!r) {
> + return r;
> + }
> + if (msr_le) {
> + ppc_cpu_gdb_swap_register(mem_buf, n, r);
> + }
> if (n < 32) {
> /* gprs */
> env->gpr[n] = ldtul_p(mem_buf);
> - return sizeof(target_ulong);
> } else if (n < 64) {
> /* fprs */
> - if (gdb_has_xml) {
> - return 0;
> - }
> env->fpr[n-32] = ldfq_p(mem_buf);
> - return 8;
> } else {
> switch (n) {
> case 64:
> env->nip = ldtul_p(mem_buf);
> - return sizeof(target_ulong);
> + break;
> case 65:
> ppc_store_msr(env, ldtul_p(mem_buf));
> - return sizeof(target_ulong);
> + break;
> case 66:
> {
> uint32_t cr = ldl_p(mem_buf);
> @@ -107,25 +167,22 @@ int ppc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
> for (i = 0; i < 8; i++) {
> env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
> }
> - return 4;
> + break;
> }
> case 67:
> env->lr = ldtul_p(mem_buf);
> - return sizeof(target_ulong);
> + break;
> case 68:
> env->ctr = ldtul_p(mem_buf);
> - return sizeof(target_ulong);
> + break;
> case 69:
> env->xer = ldtul_p(mem_buf);
> - return sizeof(target_ulong);
> + break;
> case 70:
> /* fpscr */
> - if (gdb_has_xml) {
> - return 0;
> - }
> store_fpscr(env, ldtul_p(mem_buf), 0xffffffff);
> - return sizeof(target_ulong);
> + break;
> }
> }
> - return 0;
> + return r;
> }
>
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] [PATCH v8] target-ppc: gdbstub allow byte swapping for reading/writing registers
2014-04-05 14:51 ` Andreas Färber
@ 2014-04-05 14:55 ` Alexander Graf
0 siblings, 0 replies; 3+ messages in thread
From: Alexander Graf @ 2014-04-05 14:55 UTC (permalink / raw)
To: Andreas Färber, Thomas Falcon, qemu-devel; +Cc: qemu-ppc
On 05.04.14 16:51, Andreas Färber wrote:
> Am 04.04.2014 22:23, schrieb Thomas Falcon:
>> This patch allows registers to be properly read from and written to
>> when using the gdbstub to debug a ppc guest running in little
>> endian mode. It accomplishes this goal by byte swapping the values of
>> any registers if the MSR:LE value is set.
>>
>> Signed-off-by: Thomas Falcon <tlfalcon@linux.vnet.ibm.com>
>> ---
>> Differences for v7:
>>
>> Inlined the register_read() and register_write() wrapper functions
>> ---
>> target-ppc/cpu-qom.h | 1 +
>> target-ppc/gdbstub.c | 125 +++++++++++++++++++++++++++++++++++++--------------
>> 2 files changed, 92 insertions(+), 34 deletions(-)
>>
>> diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
>> index 47dc8e6..aab4977 100644
>> --- a/target-ppc/cpu-qom.h
>> +++ b/target-ppc/cpu-qom.h
>> @@ -111,6 +111,7 @@ void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
>> int flags);
>> void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f,
>> fprintf_function cpu_fprintf, int flags);
>> +void ppc_cpu_gdb_swap_register(uint8_t *buf, int reg, int len);
> This is only ever used in gdbstub.c. Can we please keep it static there
> to avoid a full ppc*-softmmu rebuild?
>
>> hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
>> int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
>> int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
>> diff --git a/target-ppc/gdbstub.c b/target-ppc/gdbstub.c
>> index 1c91090..594dd08 100644
>> --- a/target-ppc/gdbstub.c
>> +++ b/target-ppc/gdbstub.c
>> @@ -21,6 +21,58 @@
>> #include "qemu-common.h"
>> #include "exec/gdbstub.h"
>>
>> +static int ppc_cpu_gdb_register_len(int n)
> Nitpick: Since these two functions do not operate on the CPU, you could
> just use ppc_gdb_* rather than ppc_cpu_gdb_*.
>
>> +{
>> + switch (n) {
>> + case 0 ... 31:
>> + /* gprs */
>> + return sizeof(target_ulong);
>> + case 32 ... 63:
>> + /* fprs */
>> + if (gdb_has_xml) {
>> + return 0;
>> + }
>> + return 8;
>> + case 66:
>> + /* cr */
>> + return 4;
>> + case 64:
>> + /* nip */
>> + case 65:
>> + /* msr */
>> + case 67:
>> + /* lr */
>> + case 68:
>> + /* ctr */
>> + case 69:
>> + /* xer */
>> + return sizeof(target_ulong);
>> + case 70:
>> + /* fpscr */
>> + if (gdb_has_xml) {
>> + return 0;
>> + }
>> + return sizeof(target_ulong);
>> + default:
>> + return 0;
>> + }
>> +}
>> +
>> +
>> +/* The following functions are used to ensure the correct
>> + * transfer of registers between a little endian ppc target
>> + * and a big endian host by checking the LE bit in the Machine State Register
>> + */
>> +
>> +void ppc_cpu_gdb_swap_register(uint8_t *mem_buf, int n, int len)
>> +{
>> + if (len == 4) {
>> + bswap32s((uint32_t *)mem_buf);
>> + } else {
>> + bswap64s((uint64_t *)mem_buf);
>> + }
> This logic assumes that len can only be either 4 or 8. Please use an
> explicit len == 8 comparison and g_assert_not_reached() on unhandled len
> values.
>
>> +}
>> +
>> /* Old gdb always expects FP registers. Newer (xml-aware) gdb only
>> * expects whatever the target description contains. Due to a
>> * historical mishap the FP registers appear in between core integer
>> @@ -32,23 +84,26 @@ int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
>> {
>> PowerPCCPU *cpu = POWERPC_CPU(cs);
>> CPUPPCState *env = &cpu->env;
>> + int r = ppc_cpu_gdb_register_len(n);
>> +
>> + if (!r) {
>> + return r;
>> + }
>>
>> if (n < 32) {
>> /* gprs */
>> - return gdb_get_regl(mem_buf, env->gpr[n]);
>> + gdb_get_regl(mem_buf, env->gpr[n]);
>> } else if (n < 64) {
>> /* fprs */
>> - if (gdb_has_xml) {
>> - return 0;
>> - }
> I stumbled over dropping this not being related to Little Endian or
> being mentioned in the commit message. Maybe mention that this is
> replaced by ..._register_len() and returning early?
Just split the patch into 2 separate patches. One to extract the length
calculation and another one to enable LE.
Alex
^ permalink raw reply [flat|nested] 3+ messages in thread
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2014-04-04 20:23 [Qemu-devel] [PATCH v8] target-ppc: gdbstub allow byte swapping for reading/writing registers Thomas Falcon
2014-04-05 14:51 ` Andreas Färber
2014-04-05 14:55 ` Alexander Graf
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