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* [Qemu-devel] [PATCH] PPC: Only enter MSR_POW when no interrupts pending
@ 2014-04-06 20:55 Alexander Graf
  2014-04-07 17:28 ` [Qemu-devel] [Qemu-ppc] " Tom Musta
  0 siblings, 1 reply; 2+ messages in thread
From: Alexander Graf @ 2014-04-06 20:55 UTC (permalink / raw)
  To: qemu-devel; +Cc: qemu-ppc

We were entering the power saving state even when interrupts (like an
external interrupt or a decrementer interrupt) were still in flight.

In case we find a pending interrupt, don't enter power saving state.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 target-ppc/helper_regs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target-ppc/helper_regs.h b/target-ppc/helper_regs.h
index f7ec9c2..271fddf 100644
--- a/target-ppc/helper_regs.h
+++ b/target-ppc/helper_regs.h
@@ -101,7 +101,7 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value,
     hreg_compute_hflags(env);
 #if !defined(CONFIG_USER_ONLY)
     if (unlikely(msr_pow == 1)) {
-        if ((*env->check_pow)(env)) {
+        if (!env->pending_interrupts && (*env->check_pow)(env)) {
             cs->halted = 1;
             excp = EXCP_HALTED;
         }
-- 
1.8.1.4

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [Qemu-devel] [Qemu-ppc] [PATCH] PPC: Only enter MSR_POW when no interrupts pending
  2014-04-06 20:55 [Qemu-devel] [PATCH] PPC: Only enter MSR_POW when no interrupts pending Alexander Graf
@ 2014-04-07 17:28 ` Tom Musta
  0 siblings, 0 replies; 2+ messages in thread
From: Tom Musta @ 2014-04-07 17:28 UTC (permalink / raw)
  To: Alexander Graf, qemu-devel; +Cc: qemu-ppc

On 4/6/2014 3:55 PM, Alexander Graf wrote:
> We were entering the power saving state even when interrupts (like an
> external interrupt or a decrementer interrupt) were still in flight.
> 
> In case we find a pending interrupt, don't enter power saving state.
> 
> Signed-off-by: Alexander Graf <agraf@suse.de>
> ---
>  target-ppc/helper_regs.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target-ppc/helper_regs.h b/target-ppc/helper_regs.h
> index f7ec9c2..271fddf 100644
> --- a/target-ppc/helper_regs.h
> +++ b/target-ppc/helper_regs.h
> @@ -101,7 +101,7 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value,
>      hreg_compute_hflags(env);
>  #if !defined(CONFIG_USER_ONLY)
>      if (unlikely(msr_pow == 1)) {
> -        if ((*env->check_pow)(env)) {
> +        if (!env->pending_interrupts && (*env->check_pow)(env)) {
>              cs->halted = 1;
>              excp = EXCP_HALTED;
>          }
> 

Reviewed-by: Tom Musta <tmusta@gmail.com>

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2014-04-07 17:28 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
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2014-04-06 20:55 [Qemu-devel] [PATCH] PPC: Only enter MSR_POW when no interrupts pending Alexander Graf
2014-04-07 17:28 ` [Qemu-devel] [Qemu-ppc] " Tom Musta

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