[Qemu-devel] [PATCH 04/26] tcg-ppc64: Relax register restrictions in tcg_out_mem_long

[Richard Henderson <rth@twiddle.net>]

In order to be able to use tcg_out_ld/st sensibly with scratch
registers, assert only when we'd incorrectly clobber a scratch.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/ppc64/tcg-target.c | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 951a392..dbe9c5c 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -714,10 +714,9 @@ static void tcg_out_mem_long(TCGContext *s, int opi, int opx, TCGReg rt,
                              TCGReg base, tcg_target_long offset)
 {
     tcg_target_long orig = offset, l0, l1, extra = 0, align = 0;
+    bool is_store = false;
     TCGReg rs = TCG_REG_R2;
 
-    assert(rt != TCG_REG_R2 && base != TCG_REG_R2);
-
     switch (opi) {
     case LD: case LWA:
         align = 3;
@@ -725,19 +724,22 @@ static void tcg_out_mem_long(TCGContext *s, int opi, int opx, TCGReg rt,
     default:
         if (rt != TCG_REG_R0) {
             rs = rt;
+            break;
         }
         break;
     case STD:
         align = 3;
-        break;
+        /* FALLTHRU */
     case STB: case STH: case STW:
+        is_store = true;
         break;
     }
 
     /* For unaligned, or very large offsets, use the indexed form.  */
     if (offset & align || offset != (int32_t)offset) {
-        tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R2, orig);
-        tcg_out32(s, opx | TAB(rt, base, TCG_REG_R2));
+        tcg_debug_assert(rs != base && (!is_store || rs != rt));
+        tcg_out_movi(s, TCG_TYPE_PTR, rs, orig);
+        tcg_out32(s, opx | TAB(rt, base, rs));
         return;
     }
 
-- 
1.9.0