From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59891) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WftB0-0004Zv-VP for qemu-devel@nongnu.org; Thu, 01 May 2014 11:45:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WftAu-0006nS-6s for qemu-devel@nongnu.org; Thu, 01 May 2014 11:45:34 -0400 Received: from mail-qg0-x233.google.com ([2607:f8b0:400d:c04::233]:34863) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WftAt-0006nG-Lo for qemu-devel@nongnu.org; Thu, 01 May 2014 11:45:27 -0400 Received: by mail-qg0-f51.google.com with SMTP id z60so3504669qgd.10 for ; Thu, 01 May 2014 08:45:27 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Thu, 1 May 2014 08:44:25 -0700 Message-Id: <1398959087-23590-5-git-send-email-rth@twiddle.net> In-Reply-To: <1398959087-23590-1-git-send-email-rth@twiddle.net> References: <1398959087-23590-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 04/26] tcg-ppc64: Relax register restrictions in tcg_out_mem_long List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: av1474@comtv.ru In order to be able to use tcg_out_ld/st sensibly with scratch registers, assert only when we'd incorrectly clobber a scratch. Signed-off-by: Richard Henderson --- tcg/ppc64/tcg-target.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index 951a392..dbe9c5c 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -714,10 +714,9 @@ static void tcg_out_mem_long(TCGContext *s, int opi, int opx, TCGReg rt, TCGReg base, tcg_target_long offset) { tcg_target_long orig = offset, l0, l1, extra = 0, align = 0; + bool is_store = false; TCGReg rs = TCG_REG_R2; - assert(rt != TCG_REG_R2 && base != TCG_REG_R2); - switch (opi) { case LD: case LWA: align = 3; @@ -725,19 +724,22 @@ static void tcg_out_mem_long(TCGContext *s, int opi, int opx, TCGReg rt, default: if (rt != TCG_REG_R0) { rs = rt; + break; } break; case STD: align = 3; - break; + /* FALLTHRU */ case STB: case STH: case STW: + is_store = true; break; } /* For unaligned, or very large offsets, use the indexed form. */ if (offset & align || offset != (int32_t)offset) { - tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R2, orig); - tcg_out32(s, opx | TAB(rt, base, TCG_REG_R2)); + tcg_debug_assert(rs != base && (!is_store || rs != rt)); + tcg_out_movi(s, TCG_TYPE_PTR, rs, orig); + tcg_out32(s, opx | TAB(rt, base, rs)); return; } -- 1.9.0